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TMS570LS3137: Ethernet/LWIP with DP83848YB PHY

Part Number: TMS570LS3137
Other Parts Discussed in Thread: TMS570LC4357, HALCOGEN

My design has worked using simple code to link two boards and send packets at MAC level between each other.

I've been given code based on lwIP which worked on a TMS570LC4357 development board, reporting incoming data to an SCI port. I've changed the HALCoGen settings to get the 3137 part drivers.

Connecting to a laptop running Wireshark and Packet Sender, the TMS Good Frames & Broadcast frames counters increment as expected (0xfcf78200, 204), with equal counts unless I enable the promiscuous mode, when the "good" shows many more than the broadcast. OK.

I can get no operation of the interrupt system to process this data. The RXINTSTATRAW register is always zero, and although the TXnHDP and RXnHDP look sensible, they never change, and the adresses pointed to (plus a good many subsequent locations) appear to contain garbage. Every other register seems to have sensible settings, although I can only get 0 in C0RXSTAT (but that shouldn't matter). I have added an SCI output to show if the interrupt has been triggered (not).

Can you help, please? Thanks

  • Hello King,

    The EMAC control module combines different interrupt signals from both the EMAC and MDIO modules into four interrupt signals (C0RXTHRESHPULSE, C0RXPULSE, C0TXPULSE, C0MISCPULSE) that are routed to the Vectored Interrupt Manager (VIM). The VIM is capable of relaying all four interrupt signals to
    the CPU.

    When an interrupt is generated, the reason for the interrupt can be read from the MAC input vector register (MACINVECTOR) located in the EMAC memory map. MACINVECTOR combines the status of the following 28 interrupt signals.

    The RX ISR in LWIP sample code is EMACCore0RxIsr() located in lwip_main.c

  • Thanks. But, my question is how to get any response from a broadcast message. The RX0HDP points to what looks like an acceptable structure, although the issue of little versus big-endian confuses me substantially. I have some code written by a colleague that lets me peek & poke registers: in 99% of use, the input and output display conform to little-Endian. However, the RX0HDP registers are all in big-endian: I cannot decide if this is correct.
    My criteria for any response is either a proper interrupt call, which will display a text message, or at least a value in the RXINTSTATRAW register, which remains resolutely zero.
    The RX0-pointed data areas are also zero.
    Something which doesn't appear to work is the EMAC Control Module Software Reset. Even if I send 0xffff_ffff to eliminate endian problems, the RX0HDP registers still remain with their original values.

    RXGOODFRAMES and RXBCASTFRAMES counts increment as expected, giving me confidence that the PHY is operating correctly - I can see 25MHz on the RX_Clock

    Can you shed any light, please?
    Regards, Nick
  • May I re-phrase my question:
    What are the requirements in the EMAC engine to cause RXINTSTATRAW to be set when a Broadcast message is received, as shown by RXBCASTFRAMES count incrementing.

    Do I have to set any of the Receive Buffer Descriptor flags, for instance SOP? The Manual, para 29.2.6.5 of SPNU499B–November 2012–Revised August 2013 is confusing me.

    Thanks
  • Hello King,

    I just run a test on my EVM with lwip demo code. The Ostinato was used on my PC to TX packets. I added a breakpoint at:

       hdkif_rx_inthandler(&hdkNetIF[instNum]);

    And noticed that the bit 0 and bit 7 are set.This means I got the  raw interrupts for channel0 (rx).

  • The problem has been shown to be an issue with Endianness. The TMS570LC4357 needs its Header Pointers apparently in Big Endian. I say "apparently" since I've no evidence to say whether the tools themselves are converting the Endianness of the main code to what appears to be Little Endian, or what I would call algebraic format.

    Although both User Manuals say that the 4357 / 3137 are Big Endian, the 3137 actually functions using algebraic format for its pointers. Even more confusing is that it has a register, ENDIAN_REG, which says Big Endian! I see no method of switching this.

    Although I tried this swap early on, I didn't realise that the Interrupt vectors have been pointed to some user code, as opposed to the HALCoGen-provided, in emac.c. Success.