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RM48L952: Voltage, Power Supply, and RM48 On-Chip Flash Banks erasing itself

Part Number: RM48L952
Other Parts Discussed in Thread: HALCOGEN

Hello,

  We are using the hercules RM48L952ZWT board, with HalCoGen 4.3.0. What would cause parts of On-Chip Flash with data to randomly erase on your RM48 part?

I read on another thread that the RM48 on-chip Flash is sensitive to glitches on VDD and that can cause all sorts of deviations from normal operation, including partial or complete erasure of FLASH. If VDD is allowed to raise or fall slowly, no internal detector is not engaged and an external reset circuit is not provided, because of noise and/or power supply ramp rates. I read that an under-voltage condition while writing the flash memory can corrupt flash contents. It is my understanding there is no internal detector in the RM48 to monitor that the operating volt-age matches the detection level. There is also no external low VCC reset protection circuit can be used. If a reset occurs while a write operation is in progress, the write operation will be completed provided that the power supply voltage is sufficient.

If this is correct, what are the precise fluctuations of voltage for the RM48 that would corrupt/erase the flash banks (Bank 7 which I know is different type of Flash because of the larger number of erase/writes allowed then Banks 0 and 1)? Any recommendations? Thank you.

  • Hello Tammy,

    The MCU itself has glitch filters on VCC, VCCIO, and nPORRST etc. Please refer to the datasheet for the characteristics of the filters. The MCU has an internal voltage monitor (VMON) which monitors VCC and VCCIO. VMON doesn't monitor VCCP and VCCAD.

    The HDK board has external power supervisor monitoring VCC and VCCIO. If the power rails low than defined threshold (10.98V, 3V), the board will be powered cycle (nPORRST).

    If the power supply drops lower than the minimum level while writing data to the flash, the flash operation will be corrupted and the data might be lost. The data in other portion of the flash may not be affected.

    Can you please give me the link of the thread you mentioned above? Thanks
  • Hi QJ,
    Thank you I will forward to the hardware team. Yes I will search the blog again and send the link. Where is the link to the datasheets that would state the minimum level so I can forward that to our hardware team as well? I can down load and forward to them then. Thank you again.

  • Hi Hammy,

    Here is the datasheet:
    www.ti.com/.../tms570lc4357.pdf

    Operating condition: Page 56
    VMON: page 65
    Glitch Filters for VCC, VCCIO: Page 65
    Glitch Filters for PORST and nRST: Page 89
  • Hi QJ,

    Thank you. I have forwarded the document to our hardware engineers. Is the only possibility that the Flash would be erased, or is it also possible the data is scambled (so we also should have CRC checks with a backup of bank 7 data)? Thank you again.
  • Hi Tammy,

    If the chip is operating under the recommended operating conditions, the flash should not be erased randomly.
  • Hi QJ,

    We figured out the pattern. It happens when we have the TI bootloader version on the board which does the minor board bring up then loads the rest of the software (if AC fluctuates during the bootloader initializing then flash is erased/corrupted). Versus no bootloader and HalCogen, with the TI halcogen generated code AC fluctuation does not erase the Flash. I can open a new thread because it relates to the TI bootloader initialization vs Halcogen generated initialization. Thank you again. Tammy