Hi,
I am setting up the IOMM PINMMR registers to setup our system, and until now I was initializing PINMMR registers with 32 bits writes, that initialize the 4 fields of each PINMMR register.
But then I noticed 2 things:
- some parts of the PINMMR registers are not documented in Table 6-1 of TMS570LC4357 TRM chapter 6 (as instance PINMM4[24-31]):
- some PINMMR are indicated as "reserved" in the same table: my code didn't initialize those registers since they are marked as reserved
Additionnally, when looking with a debugger to those memory mapped register, I can see that the default values are sometimes 0x1, sometimes 0x2 and some other times 0x0 (this value is not documented).
So my question is the following: Do those 2 specific types of sections (partial PINMMR undocumented and PINMMR locations marked as "reserved") carry any relevant information used internally by the TMS570 to work as intended, or not?
The answer will determine if the values on reset needs to be kept or even needs to be forced (in our design, the safety recommendation is to ensure a proper configuration by assuming that the default reset values of the CPU registers could be different from the documentation), or if any value can be written with no impact on the system.
If writing to those locations have no effect, where could I find the information in the documentation in order to justify my requirements at detailed design level?
Best regards,
Gael