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TMS570LS3137: OTP memory map

Martin Beaucage
Intellectual 850 points
Part Number: TMS570LS3137

Hello,

I understand there is a lot of stuff programmed in the DSP OTP memory, is there a document that show a memory map and a description of all that stuff?

Thanks,

Martin

  • 0
    TI__Guru**** 186256 points
    Hello Martin,

    The TMS570 family of devices have both TI and Customer OTP (One Time Programmable) memory implemented. The TI OTP area is used to store various data about the device like device specific settings. The Customer OTP may be used as the customer to store similar data.

    More information about the TMS570 OTP can be found in section 5.4.2 (spnu499b.pdf).
  • 0 in reply to QJ Wang
    Intellectual 850 points

    Hello Wang,

    Thanks for the information but what I would like is something more complete. For example, the OTP contains the AJSM key, deliberately corrupted data to test ECC protection and more. These memory areas are referred to in various documents but I was wondering if there was a document that shows the complete content of the OTP, TI and customer.

    Thanks,

    Martin

  • 0 in reply to Martin Beaucage
    TI__Guru**** 186256 points

    Hello Martin,

    The AJSM 128-bit visible unlock code or lock key (secured device) is at OTP address 0xF000_0000. The part is documented in the device datasheet.

    The deliberate ECC errors is not included in LS3237 TRM. Please refer to section 7.6 of spnu562. All the hercules devices have the deliberate ECC errors in OTP at the same address (0xF00803F0 and 0xF00803F8).

  • 0 in reply to QJ Wang
    Intellectual 850 points

    Hello,

    Ok, thanks!

    Martin

  • 0 in reply to Martin Beaucage
    Intellectual 850 points

    Hello,

    I have another question about the deliberate ECC error. In SPNA106D section 2.14, it is said that the OTP contains this data with deliberate ECC errors.

    This document is for Cortex -R4F so why are those error not included in the TMS570LS3137? When I read those addresses I see data 0x12345678 and 0x9ABCDEFx but it doesn't generate an error.

    Is it about the revision? I am using a chip revision C.

    Thanks,

    Martin

  • 0 in reply to Martin Beaucage
    TI__Guru**** 186256 points
    Hello Martin,

    I am sorry It is not include in the current version of LS3137 TRM. Two have ECC error, please enable ECC and ECC response:

    1. Enable CPU Event Export : This allows the CPU to signal any single-bit or double-bit errors detected by its ECC logic for accesses to program flash or data RAM.
    _coreEnableEventBusExport_();

    2. Enable flash ECC
    _coreEnableFlashEcc_();

    3. Enable response to ECC errors indicated by CPU for accesses to flash
    flashWREG->FEDACCTRL1 = 0x000A060AU;