This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS570LS1224: Prefetch abort after bootloading

Part Number: TMS570LS1224
Other Parts Discussed in Thread: HALCOGEN

Dear Support,

One of my colleague created a code for TMS. It's working well if I don't use bootloader but when I upload with bootloader I got a prefetch abort. I haven't seen this problem with other codes or previous codes. I could collect some information about the prefetch abort. The instruction fault register is 0x00000000 and the instruction fault address is 0x00045F34 which is the start address of the MPU_xTaskGetTickCount (I'm using safeRTOS). I couldn't find a reason of this behavior. Can you help me with this? Thank you!

Kind regards,

Keno

  • Hello Keno,

    Please check the register FSR in CP15. The memory register might be protected by MPU.

  • Hi QJ,

    As I mentioned in the previous post FSR is 0x00000000.

    Any idea? Thank you!

    Kind regards,

    Keno

  • Hello Keno,

    Have you solved the problem?
  • Hi Keno,

    I generated a freeRTOS through HALCoGen, and programmed the freeRTOS project into flash using UART bootloader. It looks ok to me.

    I assume you have solved the problem. If this issue is still bothering you, please open the thread and post your code. Thanks
  • Hi QJ,

    As I mentioned I'm using safeRTOS (I haven't got any problems with freeRTOS) where MPU is pretty important. I think the problem is related with MPU configurataion. Unfortunately I can't share my code. Thank you!

    Kind regards,
    Keno
  • Hi Keno,

    How did you configure the exception vector table in your bootloader? The exception vector table (prefetch abort, data abort, SVC,...) is located at the start of the flash memory at address 0x00.

    The first entry, the reset vector, has to always point to the main hardware initialization routine in the bootloader since it has to be executed right after any reset. The last two entries are used to load the interrupt vector address from the Vectored Interrupt Manager (VIM) into the PC register (ldr pc,[pc,#-0x1b0]). Because the vectors for the IRQ and FIQ interrupt handlers are usually dispatched by the VIM, it is not necessary to relocate these vectors. 

    The other vectors for SVC, Abort etc need to be relocated to application.