Hercules™ Safety Microcontrollers

Browse by Tags

Hercules™ Safety Microcontrollers

Welcome to the Hercules™ Safety Microcontrollers Section of the TI E2E Support Community. Ask questions, share knowledge, explore ideas, and help solve problems with fellow engineers. To post a question, click on the forum tab then "New Post".

Sign In to Post
Tags
You have subscribed to this tag. To view or manage your tag subscriptions, click here.   Close
You have unsubscribed from this tag. To view or manage your tag subscriptions, click here.   Close
You are currently viewing:
ECC
Related Posts

  • Forum Post: Performance difference when enabling ECC for Flash

    Hiroshi Kimizuka
    When enabling ECC calculation for the on-chip Flash, how much is the performance differentiation(degradation) on TMS470MF ? If the pipeline mode is activated, can this calculation and other relevant overhead be hidden under the pipeline ? Thanks and Best Regards, KIMIZUKA
    on Jun 18, 2010

  • Forum Post: Re: Initializing RAM and ECC

    A Arora
    Brian, In trying to cover the different ECC mechanisms in TMS570, TMS470M, etc, the ECC app note became a bit unclear. We will work on improving the readability of this document. Here's some more information to help clarify: The ECC mechanism embedded in the R4 (TMS570) is always on. And...
    on Apr 30, 2011

  • Forum Post: Re: RAM ECC Questions

    Pratip Kumar
    Lucas, According to your safety manual for the TMS570, upon detecting a single bit ECC error, the software shall attempt to correct he error by writing the data back to the address and check the corrected memory (presumably by reading the data again and checking if another ECC fault has occurred)...
    on Jun 9, 2011

  • Forum Post: Re: RAM ECC Questions

    Pratip Kumar
    Lucas, For the steps (1 to 15 ) that you mention in your test , the behaviour is expected as per the R4 ECC design. Regards, Pratip
    on Jun 9, 2011

  • Forum Post: Re: TMS570 EEPROM Single Error Correction Issue

    Pratip Kumar
    Jonas, I had a quick look at your code. Just to help me out , could you send a snap shot of the CCS4 debug memory with values from EEREG (0xFFF87300U) registers.
    on Sep 28, 2011

  • Forum Post: Single Error ECC Address is 18 Bit but the RAM Base Address is 32-Bit. How to MAP?

    Pashan
    Hello, I find that RAMSERRADDR of TCRAM Wrapper [ECC] is 18 Bit of DATA, which provides the location of Single Error Correction Address of RAM with ECC enabled. But the RAM Base Address is 0x0800 0000. How to related the RAMSERADDR value to the actual RAM address? Thank you. Regards...
    on Jun 18, 2011

  • Forum Post: Re: Simulating 1-bit ECC error in F035 flash module

    Juan Martinez
    Hi Andreas, I have good news and bad news Good news: Thank you for your suggestions. I checked SBE_FLG, and it was set; I tried testing with SUSP_IGNR but either value I gave it would not make a difference; the VIM and the ESM both flagged the interrupt/error... but I had not enabled the interrupt...
    on Nov 30, 2011

  • Forum Post: Where are the OTP values with ECC errors for TMS570LS20216?

    Juan Martinez
    I have read in the forum that there are OTP values with 1-bit and 2-bit ECC errors, but I can't find them in the TRM or data sheet for the TMS570LS20216. Where are they located? Do they exist for this board? -Juan
    on Dec 2, 2011

  • Forum Post: Initializing RAM and ECC (part 2)

    Juan Martinez
    Hello, For the TMS570LS20216 I have read in the thread called Initializing RAM and ECC that once a value is written to RAM, its ECC value is updated as well. So if I enable the RAM memory initialization by asserting MINITGCR and MSIENA without enabling ECC in the R4 CPU through its coprocessor...
    on Dec 13, 2011

  • Forum Post: Double Bit SRAM ECC Error Insertion

    Krishna Battu
    Hi, I am trying to insert a double bit error and expecting a DATA ABORT. I followed the below steps to introduce the double bit error. 1. Disable ECC in CPU 2. Disable ECC in RAM WRAPPER Congtrol Register 3. Set ECC Write Enable in control register. 4. Added 3 to the ECC value. 5...
    on Dec 14, 2011

  • Forum Post: Flash ECC - details needed

    Vaclav Cechticky
    Hello, I'd like to ask a few details about the Flash ECC realization. A part of the Application Report SPNA106A is code implementing the intialization steps of Hercules MCU. Thank you very muc for this application report and code, I find it really great. One of the initialization steps is checkFlashECC...
    on Mar 8, 2012

  • Forum Post: Re: Flash ECC - details needed

    Vaclav Cechticky
    Hello Karl, Thank you for your prompt reply. I think, I've got it. Regards Vaclav
    on Mar 8, 2012

  • Forum Post: Re: Flash ECC Enable for TMS570LS3137

    Alex Spivak
    Suni, Thanks for quick response. I understand that you are saying, I didn't program the ECC for my constants and that is why the software crashes when it is trying to read them. Is that correct? I thought that I did program all correctly as I did for the other processor. Here is my ECC batch...
    on Mar 22, 2012

  • Forum Post: Re: Flash ECC Enable for TMS570LS3137

    Alex Spivak
    Sunil, This was the problem. The code to ECC size ratio in my first processor is 2:1, but in this processor it is 8:1, so I misplaced my constants ECC in nowFlash. Thanks for help. Did you have time to look again at my MibSPI/DMA issue? Alex
    on Mar 22, 2012

  • Forum Post: Flash ECC Enable for TMS570LS3137

    Alex Spivak
    Hello, I have been writing drivers for TMS570 in the past year and not long ago I moved from TMS570LS20216 Development kit to TMS5703137 development kit. On the new development board my software began to crash until I fount that the reason was enabling the ECC on the flash. In our software we have...
    on Mar 21, 2012

  • Forum Post: Using NowECC to generate linkable output?

    Marco Moreno
    Hi, I'm trying to get NowECC to give me a library file that I can use to link back into our firmware image and I'm missing something about how this is supposed to work. I can feed an S-record file into the tool and it can output the ECC data to an S-record just fine. When I try to get a...
    on Apr 10, 2012

  • Forum Post: ECC calculation on the TMS470M

    Phil Eagleton
    Hi, does anyone know if the Fapi_HardwareCalculateEcc function works on the TMS470M? I am using the API 1.06, which is the latest off the website. I have run the function on 16 bytes, 4 32bit words, and the resultant ECC words returned appear to be the same, regardless of the data that I have programmed...
    on Jun 15, 2012

  • Forum Post: TCRAM ECC: Unexpected DATA ABORT

    Krishna Battu
    Test 1: To insert a single bit error and expecting an interrupt. The below is the test sequence followed: Disable ECC in CPU by using the code given by the TI Disable ECC in EVEN RAM WRAPPER (0xFFFF F800) and enable ‘ECC WR EN’. Modifying from ‘0x0000 000A’ to ‘0x0000...
    on Dec 20, 2011

  • Forum Post: User requirements for flash

    Marco Moreno
    Hi, I just wanted to clarify a couple of things from the safety manual regarding flash user requirements. From section 2.2.6.4 there are a couple of statements: 1. The flash memory information shall be protected by ECC during normal operation. The device shall be configured properly to report...
    on Nov 11, 2012

  • Forum Post: RE: How to write a routine to continuously refresh flash/ram memory by using ECC?

    Pritesh Gudge
    I have written a short code which attempsts to check the ECC mechanism for the SRAM. But it does not give the expected output. Please refer below. All the functions used are from the Halcogen generated code for TMS570LS31x HDK development kit. The Corresponding ECC memory is : 0x084000C0. I am using...
    on Jan 30, 2013

  • Forum Post: Testing the ECC Mechanism in TMS570 problem

    Pritesh Gudge
    Hi, I have written a short code which attempts to check the ECC mechanism for the SRAM by creating an error in the data bits. But it does not give the expected output. Please refer below. All the functions used are from the Halcogen generated code for TMS570LS31x HDK development kit. The Corresponding...
    on Jan 31, 2013

All content and materials on this site are provided "as is". TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with regard to these materials, including but not limited to all implied warranties and conditions of merchantability, fitness for a particular purpose, title and non-infringement of any third party intellectual property right. TI and its respective suppliers and providers of content make no representations about the suitability of these materials for any purpose and disclaim all warranties and conditions with respect to these materials. No license, either express or implied, by estoppel or otherwise, is granted by TI. Use of the information on this site may require a license from a third party, or a license from TI.

Content on this site may contain or be subject to specific guidelines or limitations on use. All postings and use of the content on this site are subject to the Terms of Use of the site; third parties using this content agree to abide by any limitations or guidelines and to comply with the Terms of Use of this site. TI, its suppliers and providers of content reserve the right to make corrections, deletions, modifications, enhancements, improvements and other changes to the content and materials, its products, programs and services at any time or to move or discontinue any content, products, programs, or services without notice.

TI Worldwide | Contact Us | my.TI Login | Site Map | Corporate Citizenship | mobile m.ti.com (Mobile Version)

TI is a global semiconductor design and manufacturing company. Innovate with 100,000+ analog ICs and
embedded processors, along with software, tools and the industry’s largest sales/support staff.

© Copyright 1995-2013 Texas Instruments Incorporated. All rights reserved.
Trademarks | Privacy Policy | Terms of Use