Hercules™ Safety Microcontrollers

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Hercules™ Safety Microcontrollers

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EMIF
Related Posts

  • Forum Post: Re: EMIF Interface to 256K 16-bit SRAM

    Jean-Marc Mifsud
    Tony, To connect an external 16bits memory with BLE/BHE for 8bits accesses, please follow this recommandation: EMIFADD[16:0] to SRAM_ADD[17:1] EMIFBADD1 to SRAM_ADD[0] EMIFDQM0 to SRAM_BLE EMIFDQM1 to SRAM_BHE The EMIF has to be programmed as following: Select Strobe = 0 Enhanced Wait = 0...
    on Oct 12, 2010

  • Forum Post: EMIF Interface to 256K 16-bit SRAM

    Tony Morrell
    Hi, The Technical Reference Manual Figure 10-8 in section 10.3.1.1 describes the EMIF interface to an 8-bit RAM. Here A[18:0] and EMIFBADD[1:0] are used to form the SRAM 21-bit address A[20:0]. We wish to interface to a 16-bit SRAM (CY7C1041CV33) which allows 16-bit data access as well as high...
    on Oct 12, 2010

  • Forum Post: External RAM

    Livio Franchin
    In our project we need to use an external static ram to store data in safety mode. (about 2Mbytes) Reading the safety manual of TMS570 I found that is not possible to use the external memory interface (EMIF) for safety application because it is not a safety critical device component. How can...
    on Feb 23, 2011

  • Forum Post: EMIF Unused Pins for GIO

    Tony Morrell
    Hi, The TRM does not say that the EMIF pins can be used for GIO. Can you please confirm that this is the case, EMIF pins do not have GIO capability. Regards, Tony.
    on Apr 19, 2011

  • Forum Post: Re: TMS 570 MDK Parallel I/O

    Pratip Kumar
    Rob, Does this answer your question ? Click on verify Answer if your questioin is answered. - Pratip
    on Dec 30, 2011

  • Forum Post: TMS570 and example code for setting up an extarnal SRAM.

    Magge Ericsson
    Hello TI, I wonder if you have an example code/project for setting up EMIF for an external SRAM (ISSI IS61WV102416BLL) for the TMS570? Best regards Magnus
    on Jan 3, 2012

  • Forum Post: RM48 EMIF Module in Halcogen

    Vanderwegen Martin
    Hi, I'm trying to use the EMIF module of the RM48 using halcogen in order to use the 8MB SDRAM. To configure it I've done the following steps: 1. Create a RM4x, TMDXRM48HDK project. 2. Set EMIF driver in Driver Enable Tab 3. Enable EMIF SDRAM in EMIF General 4. Set EMIF SDRAM...
    on Apr 5, 2012

  • Forum Post: Re: How to access TMS570LS31 HDK SDRAM?

    Jean-Marc Mifsud
    Takashi, The SDRAM on the HDK is accessible via the EMIF Module. There is another thread on the forum with an example at the following link http://e2e.ti.com/support/microcontrollers/hercules/f/766/t/180728.aspx Please have a look and let me know. Regards, Jean-Marc
    on Apr 16, 2012

  • Forum Post: How to access TMS570LS31 HDK SDRAM?

    Takashi TAKATORI
    Hi, I got TMS570LS31x Hercules Development Kit, and want to use the external 8MB SDRAM. But, it seems that I can't access SDRAM. Is there any initialization step to use SDRAM? I made TMDX570LS31HDK project by HALCoGen(2.09.001) and "Generate Code" default settings. I added some callback...
    on Apr 14, 2012

  • Forum Post: RM48 - EMIF - Async Connection to FPGA - 3rd nWE pulse!

    stomp
    Hi, I have a RM48 950 on the HDK. I have connected the EMIF to a Xilinx FPGA and, as a starting point, scoped the signals when I do a basic EMIF write from RM48 to FPGA. I am writing to a FIFO and are not using any addressing scheme, other than relying on BA[1:0] from the RM48 to determine the upper...
    on May 15, 2012

  • Forum Post: Use EMIF

    Pablo Cottens
    Hello. I'd like to use the EMIF connected to a SDRAM (2M) instead of the internal RAM of the microcontroller (256k). How could I achieve that? Is it possible to determine all of this on boot up, or do I have to write a piece of code inside my application to start the EMIF? Do I have to write...
    on Nov 1, 2012

  • Forum Post: How to make SDRAM work in Hercules HDK

    Michael Enggaard Pedersen
    Hello, I am trying to get the SDRAM to work on our Hercurles HDK. I am using HALCodGen to generate the code. From the schematics (and verified on the board) I can see that the SDRAM is a IS42S16400F-7BL. From the data-sheet I have looked up the timing and done the following in Halcogen: 1: Set...
    on Jan 7, 2013

  • Forum Post: RE: EMIF - Delay between cycles

    Christian Herget
    Hi Zhaohong, Do I understand you right, that if the MPU is configured to Strongly Ordered we will have 12 cycle delay on the buses plus 12 cycles delay in the EMIF for burst access, which calculates to a total delay of 24 cycles? Thanks, Christian
    on Jan 15, 2013

  • Forum Post: EMIF - Delay between cycles

    Petr Burian
    Hi, I writing to ask you what is minimal delay between individual emif read/write cycles. I used the EMIF (async.;16bit; emif clock 90MHz). I exploit an access through 64-bit pointer. If I perform two emi read/write cycles immediately successive, emif produces four read/write 16-bit cycles but...
    on Sep 3, 2012

  • Forum Post: external RAM with EMIF

    enrico terraneo
    Hi all, I'm using TMS570LS3137 with CCS v5. My project has two external RAM connected to TMS570 by EMIF. I would like to use the two external RAM in a redundant configuration , so as to increase the safety of data stored. I'm again evaluating two possible cases of How to use the external...
    on Jan 23, 2013

  • Forum Post: .bss -> EMIF SDRAM

    Pierre Negre
    Hi! I want to run .bss section on the SDRAM of the RM48 board. The uC is RM48L952LWTT. The SDRAM is ISSI IS42S16400F http://www.issi.com/pdf/42S16400F.pdf . Softs : HALCOEN v3.05 and CSSV5 What i've done : /* Linker Settings */ --retain="*(.intvecs)" /*-----------------------------...
    on Mar 25, 2013

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