Hercules™ Safety Microcontrollers

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Hercules™ Safety Microcontrollers

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FIQ
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  • Forum Post: TMS470R1B1M FIQ & IRQ problem

    Jonathan Baisch
    Hi everyone. this is my first post. I am having issues using the FIQ interrupt and IRQ interrupt in conjunction. I am using IAR embedded workbench 5.00. I am looking for a procedure on how to setup the two interrupt types. The basic scenario is as follows: I have 4 interrupts on the HET. Three are...
    on Nov 4, 2010

  • Forum Post: Re: FIQ as NMI

    Richard Burke
    Hi Anthony, At least some of your questions are answered in a previous post: http://e2e.ti.com/support/microcontrollers/tms570/f/312/p/59793/218948.aspx#218948 To answer your first question: Out of reset, both IRQ and FIQ/NMI are disabled. Once the F bit is cleared in the CPSR, FIQ/NMI are enabled...
    on Apr 27, 2011

  • Forum Post: Re: FIQ as NMI

    Anthony F. Seely
    Hi Richard, I agree - thanks. I'd actually read these posts but you need to read pretty carefully. Sometimes it's mentioned that "F" cannot be set again; sometimes it's mentioned that "F" cannot be set again by software I found the following description on...
    on Apr 27, 2011

  • Forum Post: FIQ as NMI

    Anthony F. Seely
    How does the FIQ work as an NMI? Specifically: -> Is the "F" bit in the CPSR tied permanently to enabled? It seems that it changes from enabled to disabled sometimes; but this would contradict the term 'non-maskable'. -> How does one handle the case where an FIQ interrupt...
    on Apr 25, 2011

  • Forum Post: Complex SPI, DMA, CRC, RTI, FIQ integration scenario

    Tony Morrell
    I have a complex TMS570 SPI problem which I would appreciate some advice on. Requirements: My SPI Master transmits a 9-word (i.e. 9*16=144-bit) message. The first 8 words contain control data, the last word contains a CRC of the 8 data words. I am using one transfer group within my SPI, and only...
    on Apr 4, 2011

  • Forum Post: Re: FIQ disabling.

    A Arora
    Suraj, Once enabled the fiq cannot be disabled by software. It becomes an NMI. Please have a look at the following threads for relevant discussions: http://e2e.ti.com/support/microcontrollers/hercules/f/312/p/59793/218948.aspx#218948 http://e2e.ti.com/support/microcontrollers/hercules/f/312...
    on Oct 19, 2011

  • Forum Post: FIQ disabling.

    suraj sk85266
    Can i disable fiq via software interrupt.? I am calling a software interrupt in main program to disable fiq.. This is the code which i am using to disable fiq. in r1 i have saved spsr register value.. _swi_disable_fiq orr r1, r1, #0x40 msr spsr_cxsf, r1 b _swi_exit I am changing the value of spsr...
    on Oct 18, 2011

  • Forum Post: Re: Nested Interrupts Implementation

    Jean-Marc Mifsud
    Tony, The main difference between IRQ and FIQ is the fact that the CPU has a set of dedicated general purpose registers when you enter FIQ. These registers are R8 to R12. Usually the code generation tools uses these registers when a function is defined as FIQ routine. In this case, there is no need to...
    on Nov 18, 2011

  • Forum Post: Re: Atomic IRQ enable/disable?

    Sunil Oak
    Hi Marco, You can use the "Change Processor State" (CPS) assembly instruction instead of the read-modify-write macros to enable or disable interrupts. For example, CPSIE I, F ; enable IRQ, FIQ CPSIE I ; enable iRQ only CPSIE F ; enable FIQ only CPSID I ; disable IRQ The CPS...
    on Feb 29, 2012

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