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Hercules™ Safety Microcontrollers
Welcome to the Hercules™ Safety Microcontrollers Section of the TI E2E Support Community. Ask questions, share knowledge, explore ideas, and help solve problems with fellow engineers. To post a question, click on the forum tab then "New Post".
I'm new on TI microcontrollers. I'm making an USB/SCI interface to program a TMS470M microcontroller, based on the HDK schematic (processors.wiki.ti.com/.../TMS470M_HDK_Schematics.pdf) but I found a CPLD on it. Did it make some diference if I link the JTAG-IO directly to the FT2232 instead of the CPLD?
My question is what does the CLDP do to the JTAG singnals?
I am trying to come up with a unique MAC Address for the RM48 processor project that I am working on. I looked through all of the docs that I could find (trm etc.) and could not find a processor serial number or a Die ID number. The board that I am working on will have the RM48 and a TMS470 on it. The TMS470 has a 64 bit Die ID (High 32 bits, and Low 32 bits). My question is what is the layout of the bits in the two 32 bit registers. I am looking for 48 unique bits if that is available. I have looked at the values for two of our boards and found some of the bytes were the same but broken up in different ends of the words. I am guessing that part of the ID words are revision or run ID values, and hoping that there is another part that is unique to each CPU Die.
I am using RM48L92 for my application.I am using CCS 5.3 IDE and toolchain version is 5.0.9.
My application is related to the communication , i.e. i am using packed structure.
For these structure we want to use packed attribute for pointer declaration. syntax is given below
uiTempDIOPointer = (__packed unsigned short int *)&g_st_ContactInputs;
but for this line its give me compilation error.
If toolchain support for packed then why it give me error?
Vipin Kumar Mishra
I did not find layout considerations in technical reference manual RM48L952
could you pass me some Suggest layout?
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