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MSP430 Ultra-Low Power 16-bit Microcontroller Forum
XT2 Oscillator requirements on MSP430F543xA devices
I have a question regarding the XT2 crystal oscillator connections on the MSP430F543xA devices. how are the values of external crystal determined for the different modes? (i.e. mode 0, 1, 2 and 3)
The way I interpret the datasheet is that the external crystal for mode 2 can be anywhere in the range of 16 to 24MHz, which can be configured to directly drive the CPU and system MCLK. Is that correct?
Is there an app note that explains how to connect external crystals (including PCB layout considerations) to these devices?
You are correct, XT2DRIVEx=2 supports crystals from 16Mhz to 24Mhz. The datasheet also includes the integrated load capacitance of 1pF, so you need to add external capacitors to match the load capacitance of your crystal.
You can find more details and some design considerations here: http://processors.wiki.ti.com/index.php/Crystal_Oscillators_Using_MSP430
The datasheet also includes some guidelines:
To improve EMI on the XT2 oscillator the following guidelines should be observed.(a) Keep the traces between the device and the crystal as short as possible.(b) Design a good ground plane around the oscillator pins.(c) Prevent crosstalk from other clock or data lines into oscillator pins XT2IN and XT2OUT.(d) Avoid running PCB traces underneath or adjacent to the XT2IN and XT2OUT pins.(e) Use assembly materials and praxis to avoid any parasitic load on the oscillator XT2IN and XT2OUT pins.(f) If conformal coating is used, ensure that it does not induce capacitive/resistive leakage between the oscillator pins
Luis RC(b) Design a good ground plane around the oscillator pins.
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To Luis RC and Jens-Michael Gross --> Thank you for your responses. The information is very helpul. So that I understand correctly, if I install a 16MHz external crystal on XT2 (XT2DRIVEx=2), then the maximum MCLK (or CPU/system clock) will be 16MHz, correct?
I will take the PCB layout guidelines into consideration when I start to layout my board. I can send a snaphot of the layout for you to review and get your feedback.
Terry Jendon99319 if I install a 16MHz external crystal on XT2 (XT2DRIVEx=2), then the maximum MCLK (or CPU/system clock) will be 16MHz, correct?
XT1, XT2, DCO etc. are just possible clock sources for MCLK, SMCL and ACLK. (that's why the clock system is called 'unified clock system'). It's your job to ensure that they do not exceed the current operating parameters of the system (limited by supply and core voltage). So you might be able to attach a 50MHz crystal and use it for SMCLK with a /2 divider.
For peripherals, including ACLK and SMCLK, the maximum clock is 25MHz, independently of MCLK and supply voltage. So you can run the timers with 25MHz and MCLK with 16 (or, for synchronized clocks) with 12,5Mhz (same 25MHz crystal but /2 divider)
It also sounds like I wouldn't even need an external crystal on XT2 in order to achieve 25MHz operation for MCLK, ACLK and SMCL. I could then use the internal FLL/DCO to generate my clocks, correct?
Yes, I can ceratinly understand why its called a 'unified clock system'.
Terry Jendon99319It also sounds like I wouldn't even need an external crystal on XT2 in order to achieve 25MHz operation for MCLK, ACLK and SMCL. I could then use the internal FLL/DCO to generate my clocks, correct?
The reason is that the DCO doesn't (except in very, very rare cases) exactly 25MHz. More likely, it will e.g. produce 24MHz and 26MHz. The modulation will alternate between the two, so the average would be 25MHz. However, the 26MHz part of the averaged output would likely be too much for the MSP (and definitely outside the specs).
For a different MSP, I once calculated a maximum safe DCO frequency of 23.4MHz, taking the DCO tolerances an DCO tap steps into account.
Terry Jendon99319Yes, I can ceratinly understand why its called a 'unified clock system'
Regarding "Unfortunately, having many options does you not only give many possibilities, but also many ways to mess things up."
I couldn't agree with you more. :-)
Thanks for the feedback and your help. I think I know just about enough the UCS to be dangerous.
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