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TI Home » TI E2E Community » Support Forums » Microcontrollers » MSP430™ Microcontrollers » MSP430 Ultra-Low Power 16-bit Microcontroller Forum » INT-Conversion time of 16-Bit ADC integrated in MSP430F20x3
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    INT-Conversion time of 16-Bit ADC integrated in MSP430F20x3

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    Xavier Albinet
    Posted by Xavier Albinet
    on Aug 01 2012 10:33 AM
    Prodigy50 points

    Hello,

    What is Conversion time of 16-Bit ADC integrated in MSP430F20x3 ?

    Thanks for your help,

    Regards, Xavier

    MSP430F20x3 ADC latency
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    • Jens-Michael Gross
      Posted by Jens-Michael Gross
      on Aug 01 2012 15:01 PM
      Guru140135 points

      It depends on working frequency (SD16CLK), selected oversampling ratio (32 to 1024 SD16CLK cycles), the selected sampling mode (first sample takes four times as long as any following sample from the same input channel).

      Read the users guide and the datasheet and you can calculate it yourself for your individual setup.

      _____________________________________
      Before posting bug reports or ask for help, do at least quick scan over this article. It applies to any kind of problem reporting. On any forum. And/or look here.
      If you cannot discuss your problem in the public, feel free to start a private conversation: click on my name and then 'start conversation'. But please do so only if you really cannot do it in a public thread, as I usually read all threads. And I prefer to answer where others can profit from it (or contribute to it) too.

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    • Xavier Albinet
      Posted by Xavier Albinet
      on Aug 02 2012 02:41 AM
      Prodigy50 points

      Ok thanks for your quick answer.

      If we have DC input signal to convert, could we use 16-Bit ADC and if yes what are INL/DNL spec vs SD16CLK cycles ? Or do you suggest to use 10-Bit ADC implemented in MSP430F20x2 ?

      Best regards, Xavier

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    • Jens-Michael Gross
      Posted by Jens-Michael Gross
      on Aug 02 2012 11:48 AM
      Guru140135 points

      I don't exactly knwo what you mean with "INL/DNL spec vs SD16CLK cycles". Do you kow how a delta-sigma converter works? I posted some detailed explanations in the forum, together with links to even more details. However, I cannot give you more data than what's already in the datasheet. They are my only source too.

      If conversion speed is your main concern, then the ADC10 is definitely faster. The SD16 conversion frequency maximum is around 34ksps. The ADC10 (or the 12 bit ADC12) can go beyond 200ksps. Here, the converison tiem is 13 clock cycles plus the sampling time for charging the sampling capacitor (4 clock cycles minimum, but mroe needed for higher-impedance sources). Clock speed is up to 6MHz (depending on MSP).
      Also, each ADC10 conversion is independent, so the conversion time does not increase when you switch input channels. in fact, scanning a range of channels is automated for the ADC10/12.
      However, the ADC10/12 does not have any input amplifier and requires DC input (at least some SD16 modules allow for negative input voltages or differential input voltages)

      _____________________________________
      Before posting bug reports or ask for help, do at least quick scan over this article. It applies to any kind of problem reporting. On any forum. And/or look here.
      If you cannot discuss your problem in the public, feel free to start a private conversation: click on my name and then 'start conversation'. But please do so only if you really cannot do it in a public thread, as I usually read all threads. And I prefer to answer where others can profit from it (or contribute to it) too.

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    • Xavier Albinet
      Posted by Xavier Albinet
      on Aug 02 2012 12:45 PM
      Prodigy50 points

      My main concern is power consumption and Linearity and I try to compare ADS7924 with ADC integrated in MSP430. My platform will use in any case MSP430 but with or without ADC.

      ADS7924 spec gives us power consumption vs different cycle (1ms for instance). This parameter can be extracted with different ADC integrated in MSP430 and compare with ADS7924.

      Now, INL Spec for ADS7924 is +/-1.5LSB and I am looking for Linearity Spec for ADC16Bit, same parameter specified for ADC10 (INL ; DNL)...

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    • Jens-Michael Gross
      Posted by Jens-Michael Gross
      on Aug 02 2012 13:54 PM
      Guru140135 points

      The problem with SD16 is that it isa 'streaming' conversion. It does not directly convert but rather takes comparisons followed by integration and loopback. So to get a conversion result, a large number of continuous comparisons is needed. You cannot switch it off to save powerwithout a tiem penalty when you switch it on again 8or switch channels). In addition to this there is some settlign time required for the reference whcih also takes some current.

      The ADC10/12 can be switched on imemdaitely before the conversion and switched off after it. However, the reference still requires some settling time. However, if your individual samples are further apart than the reference settling time (sampling frequency below 10kHz) then you can shut off the reference, and for the next sample switch it on, wait (timer based), start the conversion and when it is done switch everything off again. So while durign conversation the current consumption may be high, it will drop next to zero for the time in between. So it highly depends on the appplication.

      On an external chip, his is not an option. It is usually either on or off without any fine-control. But you may be able to generate a comparable diagram in Excel taking the individual currents and the on/off considerations I gave you. :)

      Xavier Albinet
      INL Spec for ADS7924 is +/-1.5LSB and I am looking for Linearity Spec for ADC16Bit, same parameter specified for ADC10 (INL ; DNL)...

      For SD16, this kidn of parameter doesn't exist by design. Teh SD16 outputs a stream of comparison results whose relation of 0 and 1 bits will be an exact representation of the input signal if you only take enough bits (unlimited sampling time, 100% constant input). Error comes with limiting the number of bits taken and due to the algorithm that converts even less bits into a value by a digital filter. However, this error cannot be expressed as INL or DNL. It's a completely different type of error.

      For ADC10, I can only quote what you already see in the datasheet. Well, there might be an aplicaiton note somewhere in the TI papers.

      _____________________________________
      Before posting bug reports or ask for help, do at least quick scan over this article. It applies to any kind of problem reporting. On any forum. And/or look here.
      If you cannot discuss your problem in the public, feel free to start a private conversation: click on my name and then 'start conversation'. But please do so only if you really cannot do it in a public thread, as I usually read all threads. And I prefer to answer where others can profit from it (or contribute to it) too.

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