which one do I have to use: USCI or USI or USART?

The family user's guide describes details of all modules that a family member could have. The data-sheet of each member of the family tells you what modules that specific member has.

SPI interface can be implemented with whichever synchronous serial communication module you have on the chip. You can even use bit banging with or without help from a Timer module.

MSP430-Beginner said:

So what is the difference between this 3 modules?

these are the three different modules for serial communication, as they appear in different MSPs.

USART supports UART mode (async serial, RS232), SPI and also has a very complex I2C implementation.
USI is a 16 bit shift register and clock generator that supports SPI and I2C, but needs to be handled on a relatively low level. It offers, however, some options that are almost impossible to implement on the other two.
USCI is the newest version. It offers UART mode with auto-baudrate-detection, SPI )with up to system clock speed in maste rmode) and a less complex (compared to USART) but much easier (than both others) and flexible (than USART) I2C implementation.

Some MSPs have two different (e.g. USI and USCI), some have more than one (e.g. 4 USCI in the 54xx series)

MSP430-Beginner said:

In the data sheet of MSP430AFE253, only USART0 is mentioned. Does it mean that this device has only USART?

Yes.

MSP430-Beginner said:

In the data sheet of MSP430F6638, only USCI is mentioned. Does it mean that this device has only USCI?

Yes again. The USCI is the successor of the USART module. it can do everything the USART can (except for I2C block transfer, which has to be done in software or by using DMA) and more, faster and simpler.

MSP430-Beginner said:

So if I build up a SPI communication between the 2 devices (AFE253 will be the master, and F6638 will be the slave), may any problem happen?

You will have to write dofferent software for both sides, because of the different hardware modules, and because in SPI, one is playing the master role and the other is the slave, but once you got this running, they will communicate.

If the 6638 is the master, it can poll the data from many slaves through the same or a second SPI (each USCI module can do 2 SPI connections simultaneously).
If the AFE is teh master, it can push the data to its slave 6638 (or many slaves) when it wants to send it. The master controls, when something is sent or received (other than with UART, where both directions are independent), and one master can communicate with many slaves through the same SPI bus. Yet every slave can communication with one master only and only if the master wants.

 

Jens-Michael Gross said:

, and one master can communicate with many slaves through the same SPI bus

simultaneously?

Jens-Michael Gross said:

If the AFE is teh master, it can push the data to its slave 6638

Actually I want to send the output data of SD24 ADC through SPI from AFE253 to F6638. So which one has to be the master in this case? Actually I want to send the data to F6638 to take advantage of its USB interface to send the data to a PC.

I don't find an example code for AFE253 for SPI, is there a compatible model?

MSP430-Beginner said:

simultaneously?

No. The master pulls the CS line of a device and communicates with it. Then it can release teh CS line (depending on the slave high-level protocol even in the middle of a transfer), pull anotehr slaves CS line low and talk with it.

Each slave needs one dedicated CS line and all shar ethe same clock and data lines.

MSP430-Beginner said:

which one has to be the master in this case

It depends on the exact ypplication requirements. If the 6638 shall only send through USB what it is given, then the 6638 should be the slave. However, a slave can only have one master, so if you have more than one sensor, the 6638 must be the master and poll the sensors instead of gettign data when the sensor has it ready.

The quesiton is: who shall control the timing? Sensor or USB controller? The one who determines when something has to be transferred through SPI has to be the master.