I'm working on a MSP430AFE253 using IAR 5.20.1, my question is how to use this 2 registers:
Mohamed Fakhfakhmy question is how to use this 2 registers:
My AFE datasheet doesn't mention the SD24CONF0 register at all, and teh SD24CONF1 register is marked as "reserved (internal)" in the peripheral file map. So it is not meant for being accessed by application code.
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thanks for the answer,
the SD24CONF0 is deleted due to an update, using IAR 5.20.1, in DEMO code I found this:
#define SD24CONF0_FUDGE 0x70
#define SD24CONF1_FUDGE 0x38
SD24CONF0 = SD24CONF0_FUDGE;
/* Tweaks recommended by Freising */
SD24CONF1 = SD24CONF1_FUDGE;
I'm so confused, if it is reserved, why would they change it?
Maybe a leftover from experimental silicon. Maybe a tweak that's now fixed part of the CPU startup code.
The registers aren't described in the users guide and in the datasheet, only one of them is mentioned, and as reserved. So I wouldn't bother noticing them. If they were in a previous version of users guide or datasheet and have been deleted, then for a reason. It's rather unusual that changes in datasheets were made on accident.
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