Can I add series resistors to the two spy-bi-wire lines SBWTDIO and SBWTCK so to improve ESD protection? If so, what would be the maximum value before it interferes with the programming? What document contains that kind of information?
A series resistor between SBWTCk and RST would increase the negative (low-pass) effect of an attached startup capacitor.However, the FET may already have a series resistor on its output, to prevent FET damage by a damaged target.
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My intent is not to protect the programmer, but the target. I do not want to expose JTAG pins without any protection against transients. The question is: how big of a SERIES resistor can I use without compromising programming and debugging.
Armando BarbedoI do not want to expose JTAG pins without any protection against transients.
The only series transistors I ever applied to MSP pins were to protect the input pins from overcurrent caused by accidental (or sometimes even intentional) 5V signal input.
However, if you want to make own experiments (just put a resistor there and then try how big it can be without disturbing JTAG/SBW) you can paste your results here. (and it will probably give faster results than waiting for an answer here) :)
Hint: if you found the value big enough to stop JTAG, then use at max 1/2 of it, just to be on the safe side.
SBWTDIO/RESET should be <22 Ω and the SBWTCK/TEST should be <100Ω. The programmer already has some resistance in series and the combination of resistance in the board would prevent reliable operation.
It also depends on what are on the "tool" side of those two signal lines. On the Launchpad, TI is using the MSP430F1611 GPIO pins directly (without any resistor). In rev 1.4 and earlier, they also had a 2nF on the SBTDIO/RSET signal. The SBW works but without much margin. In rev 1.5, TI decided not to load that 2 nF. SBW is still marginal.
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