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MSP4320F24 I2C Sample code

Hi,

I was trying to test i2c interface from one MSP430F2419 to another MSP430F2419, as a basic interface testing, i staerted using the sample code which was available in TI site. i took the code MSP430x261x_uscibo_i2c_07 for slave board and MSP430x261x_uscib0_i2c_06 for my master board. In MSP430x261x_uscibo_i2c_07. c file, i found  Receiver interrupt is enabled, but the vector address was named as TX_Isr.. can any one clear me on this. In my actual setup i need to use port 5 i2c lines, so what all configuration i need to change other than UCB1, P5SEL and UC1IE, UCBIAB1RX_VECTOR..

#include "msp430x26x.h"

volatile unsigned char RXData;

void main(void)
{
  WDTCTL = WDTPW + WDTHOLD;                 // Stop WDT
  P3SEL |= 0x06;                            // Assign I2C pins to USCI_B0
  UCB0CTL1 |= UCSWRST;                      // Enable SW reset
  UCB0CTL0 = UCMODE_3 + UCSYNC;             // I2C Slave, synchronous mode
  UCB0I2COA = 0x48;                         // Own Address is 048h
  UCB0CTL1 &= ~UCSWRST;                     // Clear SW reset, resume operation
  IE2 |= UCB0RXIE;                          // Enable RX interrupt

  while (1)
  {
    __bis_SR_register(CPUOFF + GIE);        // Enter LPM0 w/ interrupts
    __no_operation();                       // Set breakpoint >>here<< and read
  }                                         // RXData
}

// USCI_B0 Data ISR
#pragma vector = USCIAB0TX_VECTOR
__interrupt void USCIAB0TX_ISR(void)
{
  RXData = UCB0RXBUF;                       // Get RX data
  __bic_SR_register_on_exit(CPUOFF);        // Exit LPM0
}
#endif

4 Replies

  • The USCIAB0RX_VECTOR and USCIAB0TX_VECTOR service different types of interrupts.

    The USCIAB0TX_VECTOR handles only interrupt flags that indicate if a character has been transmitted or received. The USCIAB0RX_VECTOR handles only Start and stop conidtion flags (UCSTPIFG and UCSTTIFG). All in all TX and RX are both handled in the USCIAB0TX interrupt, while I2C state changes are handled in the USCIAB0RX interrupt.

    From page 17-24 of the 2xx User's Guide. USCI_Ax and USCI_Bx share the same interrupt vectors. In I2C mode the state change interrupt flags UCSTTIFG, UCSTPIFG, UCIFG, UCALIFG from USCI_Bx and UCAxRXIFG from USCI_Ax are routed to one interrupt vector. [USCIAB0RX]


    The I2C transmit and receive interrupt flags UCBxTXIFG and UCBxRXIFG from USCI_Bx and UCAxTXIFG from USCI_Ax share another interrupt vector. [USCIAB0TX]

  • In reply to BrandonElliott:

    Hi,

    Thanks for your reply, now I can able to get interrupts properly in both of my master board and slave board. But slave is not sending any ack ad it is pulling both the SCL and SDA line low after the R/W bit. While looking the UCB1STAT register, BUS busy and SCL is held low bit is setting always, also in this case im gettin the TX interrupt continuously. Kindly verify my code and say anything else to be done.

     

    #include "msp430x26x.h"

    unsigned char cTxdata = 0x55;

    volatile unsigned char TXByteCtr;

    unsigned int uiCount;

    void main(void)

    {

    WDTCTL = WDTPW + WDTHOLD; // Stop WDT

    if (CALBC1_16MHZ ==0xFF || CALDCO_16MHZ == 0xFF)

    {

    for(;;); // calibrate the side handle

    // seg A DCO constants

    }

    BCSCTL1 = CALBC1_16MHZ; // Set DCO

    DCOCTL = CALDCO_16MHZ;

    for(uiCount=100;uiCount>0;uiCount--) // Wait for DCO to stabilize.

    ; /* void */ // stabilize Time - around 1 uS

    P5SEL |= 0x06; // Assign I2C pins to USCI_B0

    UCB1CTL1 |= UCSWRST + UCTR; // Enable SW reset + transmit

    UCB1CTL0 = UCMODE_3 + UCSYNC; // I2C Slave, synchronous mode

    UCB1I2COA = 0x48; // Own Address is 048h

    UCB1CTL1 &= ~UCSWRST; // Clear SW reset, resume operation

    UCB1I2CIE |= UCSTPIE + UCSTTIE; // Enable STT and STP interrupt

    UC1IE |= UCB1TXIE; // Enable TX interrupt

    asm("EINT");//_BIS_SR(GIE); // Enable global interrupt

    while (1)

    {

    __no_operation(); // Set breakpoint >>here<< and

    } // read out the TXByteCtr counter

    }

    #pragma vector = USCIAB1TX_VECTOR

    __interrupt void USCIAB1TX_ISR(void)

    {

    UCB1TXBUF = ++cTxdata;

    }

    #pragma vector = USCIAB1RX_VECTOR

    __interrupt void USCIAB1RX_ISR(void)

    {

    UCB1STAT &= ~(UCSTPIFG + UCSTTIFG); // Clear interrupt flags

    }

  • In reply to BrandonElliott:

    BrandonElliott
    The USCIAB0TX_VECTOR handles only interrupt flags that indicate if a character has been transmitted or received. The USCIAB0RX_VECTOR handles only Start and stop conidtion flags (UCSTPIFG and UCSTTIFG).

    Can you comment on why those vectors are called _TX and _RX even though they are no handling what they indicate? :-) I know this is just a theoretical discussion now, but it really bothers me why those vectors are not called for example USCIAB0TR_VECTOR (TR like in UCTR flag that stands for Transceiver/Receiver) and USCIAB0FCTL_VECTOR (FlowConTroL)?

    I suppose there is a reason for what they are called that I just don't get right now.

    Best Regards,

    tml

  • In reply to tml:

    tml
    Can you comment on why those vectors are called _TX and _RX even though they are no handling what they indicate? :-)

    For SPI and UART mode, they do. However, on I2C, there's either RX or TX, but never both at the same time. So someone thought it would be smart to put both on one vector while the other one handles the additional interrupt sources (which don't exist in SPI or UART mode at all)

    On 5x family, all interrupts of an USCI module (A or B separate) are handled by the same RXTX vector.

    tml
    it really bothers me why those vectors are not called for example USCIAB0TR_VECTOR

    Because this would add some more aliases to the same vectors that handle RX and TX for SPI and UART. People would surely start using both for different ISRs and wonder why they get linker errors.