Hello All,
I know this has been asked somewhat indirectly in some other posts - but due to moderator stuff I haven't seen my posts yet in those - so - here's my question:
When the BSL is invoked on a processor - in this case - specifically one of the '5xx or '6xx devices - are all pins that are not involved in the BSL process tri-stated?
I have looked in datasheets, UG's, etc - but haven't seen this verbosely described. With JTAG - of course the JTAG I/O chain tri-states the chip per the 1149.1 spec - just wondering how closely the BSL 'spec' follows this.
Thanks,John W.
When BSL entrance sequence is invoked, the chip reacts the same way as a hardware reset, except that the program counter is loaded with the starting point of the BSL code instead of the reset vector. The BSL code normally only change the configuration of the two I/O pins that BSL needs. So all the other pins remain in the same condition as after a POR.
Hi.
OCY was right. Don't think BSL as a special program running in special mode. It is basically a program stored in ROM which is executed by using the same resources (CPU, peripherals, etc.) as normal application program.
So the answer to your question is basically the GPIO should be in floating input state during BSL operation.
Regards,
Leo Hendrawan
Hello lhend and OCY,
The 'should be' is a lot different than is or as defined in ...'IEEE 1149.X...' -
Does an actual specification exist that shows what the state of all I/O pins are in once the BSL is invoked?
Please don't try to answer a question I am not asking. I am not asking what a BSL is, Or how a BSL works. I understand that.
What I am asking is this: What are the state of the I/O pins at the instant the BSL is invoked? Are they tristated?
Can anyone please answer - are they tristated? And, does a spec exist for this? Such as JTAG explicitly defining all I/O's being tristated as is the case in the JTAG chain once JTAG has been invoked.I was hoping to see an answer like, BSL does the equivalent of JTAG regarding I/O's when the BSL vector has been invoked - or something similar.
So, there's really no hardware state machine that controls BSL execution internal to the '430 even though a sequence of hardware state machine conditions exist to invoke the BSL?
Another question - if the BSL is invoked, and a program isn't downloaded - does the '430 wait indefinitely?
"Can anyone please answer - are they tristated?" OCY answered. No they are definitely not tristated.
Regarding I/O pins, invoking BSL does the exactly same thing as hardware reset..
Read my lips, it does not matter whether you use JTAG, BSL, Reset, or anything else, I/O pins are never tristated.
Really. Hmmm.
Anyone besides OCY familiar with these circuits:
The above two pics are for illustrative (and also perhaps educational ) and does not necessarily represent the exact internal circuitry on the '430's.
Thanks,
John W.
OCY already gave the key to the answer: The BSL start sequence includes a RESET, and the datasheet clearly states that after a reset all pins are in high-Z input mode. (However, there are some MSPs with an erratum regarding some of the upper ports which do not exist in all variants of a specific MSP group, like 5438 and 5437).
And this has nothing to do with JTAG or any spec. It's just the documented default configuration after power-up or hardware reset.
The quesiton is what you call 'tri state'. Strictly spoken, 'high-z input mode' isn't exactly tri-state, but technically, it is the same.So yes, after a RESET or BSL srtart sequence (which includes a reset), all pins are in tri-state mode and the BSL only changes its single TX pin to be output.
_____________________________________Before posting bug reports or ask for help, do at least quick scan over this article. It applies to any kind of problem reporting. On any forum. And/or look here.If you cannot discuss your problem in the public, feel free to start a private conversation: click on my name and then 'start conversation'. But please do so only if you really cannot do it in a public thread, as I usually read all threads. And I prefer to answer where others can profit from it (or contribute to it) too.
Jens-Michael,
Thanks for the reply.
Does anyone know the answer to this one:
Looks like the answer may be 'yes' unless you do a custom BSL that can time out and look for something other than 0xFFFF written to the Reset vector.
Thanks,John
John,
johnw Does anyone know the answer to this one: Another question - if the BSL is invoked, and a program isn't downloaded - does the '430 wait indefinitely?
you got it, it will wait until a character is received. To understand the BSL better, you can refer to the release code which can be downloaded with SLAA450: http://www.ti.com/lit/an/slaa450b/slaa450b.pdf - http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/CustomBSL/latest/index_FDS.html