Hi All,
I’m new on the following system.
I’m working with the CC430F6137IRGC on the eZ430 watch with the IAR program IAR for MSP430.
I’m looking for a Slave i2C program for the above uP.
To read the sent data to it through J.2 and the J.3 (SDA and SCL) ports.
Hope to get a good sample for it.
Thanks,
Shimon
Hi,
the example code of CC430F6137 should have some example code for I2C slave:
http://www.ti.com/litv/zip/slac279b
It might not be the one exactly matching your requirement working at PJ.2 and PJ.3, but this should at least help you for starting.
Regards,
Leo Hendrawan
Hi Leo,
First: Thanks a lot for the link.
Second: Can you please show me how to change it from P2.6 and P2.7 (on the slave) to PJ.2 and PJ.3?
Shimon.
sorry but i think i miss something here. It is not possible to use the hardware USCI I2C with Port J. You can take any pin from P1 - P3, and you can use the Port Mapping Controller to map the I2C input output to the selected pin.
Thanks for your reply answer.
The Hw that I’m using is with the following ports i.e. J.2 and J.3.
I can’t use other ports now beside the above (J.2 and J.3.) is there another way to send/receive i2c information (slave!!!) by/with those ports?
I’m really stuck…
Hi Shimon,
Shimonshami The Hw that I’m using is with the following ports i.e. J.2 and J.3. I can’t use other ports now beside the above (J.2 and J.3.) is there another way to send/receive i2c information (slave!!!) by/with those ports?
You can try to implement software I2C (bit banging). however this is of course not so efficient since the CPU will occupied to bit bang the I2C signals everytime you want to send something via I2C. Try to google for "I2C bit banging", i am pretty sure you will get many detailed information out there.
Hi leo,
I’ve changed the Hw ports to P1.6 as the SDA and P1.7 as the SCL as you’ve told me.
How can I use the: cc430x613x_uscib0_i2c_05.c program that was on the examples that you’ve sent?
Shimon,
you can edit the code which uses the port mapping controller to setup the pins like this:
PMAPPWD = 0x02D52; // Get write-access to port mapping regs P1MAP6 = PM_UCB0SDA; // Map UCB0SDA output to P1.6 P1MAP7 = PM_UCB0SCL; // Map UCB0SCL output to P1.7 PMAPPWD = 0; // Lock port mapping registers
Let me recheck with you.
Do you mean that I can use the program that is on the examples (that you’ve sent to me...) i.e. the cc430x613x_uscib0_i2c_05.c with the following (and also change my address) to the following as follows:
//******************************************************************************
// CC430F613x Demo - USCI_B0 I2C Slave TX single bytes to MSP430 Master
//
// Description: This demo connects two MSP430's via the I2C bus. The master
// reads from the slave. This is the SLAVE code. The TX data begins at 0
// and is incremented each time it is sent. An incoming start condition
// is used as a trigger to increment the outgoing data. The master checks the
// data it receives for validity. If it is incorrect, it stops communicating
// and the P1.0 LED will stay on. The USCI_B0 TX interrupt is used to know
// when to TX.
// ACLK = n/a, MCLK = SMCLK = default DCO = ~1.045MHz
// /|\ /|\
// CC430F6137 10k 10k CC430F6137
// slave | | master
// ----------------- | | -----------------
// -|XIN P2.6/UCB0SDA|<-|----+->|P2.6/UCB0SDA XIN|-
// | | | | | 32kHz
// -|XOUT | | | XOUT|-
// | P2.7/UCB0SCL|<-+------>|P2.7/UCB0SCL |
// | | | P1.0|--> LED
// M Morales
// Texas Instruments Inc.
// April 2009
// Built with CCE Version: 3.2.2 and IAR Embedded Workbench Version: 4.11B
#include "cc430x613x.h"
unsigned char TXData;
unsigned char i=0;
void main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
PMAPPWD = 0x02D52; // Get write-access to port mapping regs
P1MAP6 = PM_UCB0SDA; // Map UCB0SDA output to P1.6
P1MAP7 = PM_UCB0SCL; // Map UCB0SCL output to P1.7
PMAPPWD = 0; // Lock port mapping registers
//PMAPPWD = 0x02D52; // Get write-access to port mapping regs
//P2MAP6 = PM_UCB0SDA; // Map UCB0SDA output to P2.6
//P2MAP7 = PM_UCB0SCL; // Map UCB0SCL output to P2.7
//PMAPPWD = 0; // Lock port mapping registers
P2SEL |= BIT6 + BIT7; // Select P2.6 & P2.7 to I2C function
UCB0CTL1 |= UCSWRST; // Enable SW reset
UCB0CTL0 = UCMODE_3 + UCSYNC; // I2C Slave, synchronous mode
UCB0I2COA = 0x48; // Own Address is 048h
UCB0CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
UCB0IE |= UCTXIE + UCSTTIE + UCSTPIE; // Enable TX interrupt
// Enable Start condition interrupt
TXData = 0; // Used to hold TX data
__bis_SR_register(LPM0_bits + GIE); // Enter LPM0 w/ interrupts
__no_operation(); // For debugger
}
// USCI_B0 State ISR
#pragma vector = USCI_B0_VECTOR
__interrupt void USCI_B0_ISR(void)
switch(__even_in_range(UCB0IV,12))
case 0: break; // Vector 0: No interrupts
case 2: break; // Vector 2: ALIFG
case 4: break; // Vector 4: NACKIFG
case 6: // Vector 6: STTIFG
UCB0IFG &= ~UCSTTIFG; // Clear start condition int flag
break;
case 8: // Vector 8: STPIFG
TXData++; // Increment TXData
UCB0IFG &= ~UCSTPIFG; // Clear stop condition int flag
case 10: break; // Vector 10: RXIFG
case 12: // Vector 12: TXIFG
UCB0TXBUF = TXData; // TX data
default: break;
And the slave program ought to work?
i haven't really tested it myself, but i think this should work.
Looking to the code, maybe you shall also change:
to:
P1SEL |= BIT6 + BIT7; // Select P1.6 & P1.7 to I2C function
Ofcourse...:-)
I'll try it tommorow and notify you.
thanks a lot for the help...
I’ve inserted the code as spoke last night.
My problems are as follows:
1st: I don’t know how to give the Master and the slave address while there is only the: UCB0I2COA = 0x48; // Own Address is 048h.
2nd: when running the code it seems that after processing the line UCB0CTL1 &= ~UCSWRST; // Clear SW reset, resume operation.
It seems that there is a contention on the SCL line have you got any idea regarding my problems?
Waiting,
P.S. The entire problems are concerning the: USCI_B0 I2C Slave TX single bytes to cc430 Slave code on the last example.
Shimon Shamsiyan 1st: I don’t know how to give the Master and the slave address while there is only the: UCB0I2COA = 0x48; // Own Address is 048h.
the UCB0I2C0A is used only when the MSP430 is set to work as slave. In I2C bus, the master doesn't really need an address since it is the one which initiates the communication, and the address is used to choose the slave only.
Shimon Shamsiyan 2nd: when running the code it seems that after processing the line UCB0CTL1 &= ~UCSWRST; // Clear SW reset, resume operation. It seems that there is a contention on the SCL line have you got any idea regarding my problems?
I am not sure whether i understand the problem here, i think you missed something after "it seems that".
Could you download the CC430 example code: http://www.ti.com/litv/zip/slac279b, and try to pair the master running cc430x613x_uscib0_i2c_04.c and the slave running cc430x613x_uscib0_i2c_05.c? Don't forget to attach pull-up resistors between SDA, SCL lines and Vcc.
I’ve used the same example on the slac279b.
On my Hw the master has an address and the slave has it’s address, to configure them I’ve used the slau208k.pdf in it there is a notification of the registers that need to be configured (UCBxI2COA and the UCBxI2CSA).
Besides I’ve changed the lines that we discussed about on the early discussion i.e. the: P2MAP6, P2MAP7 and P2SEL to: P1MAP6, P1MAP7 and P1SEL because I’m using the P1.6 and the P1.7.
Besides on the same document (slau208d.pdf page number 958) there is a notification that the Bus stalled (SCL held low) if UCBxRXBUF not read.
It seems that my problem is over there because I see that my SCL line is derived LOW after preceding the line: UCB0CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
On the example above.
My problem is how can I make/disable LOW driving on the SCL line?
And how the CPU knows that I’ve read the information that “he read”?
I really appreciate your help until now and moreover I’ll appreciate it for solution of the problem
I was brought here by googling I2C bit banging for MSP430. I am using a MSP430 with 2 USCI blocks that I am using for I2C, but the problem is I need a couple more I2C buses where the MSP430 will be the slave. I also found:
http://www.ti.com/general/docs/litabsmultiplefilelist.tsp?literatureNumber=slaa330
but this is written in assembly and I am not sure how well that will translate to the variant I am using. Has anyone seen anything written in C for MSP430 that I could somewhat easily bring into a project?
It’s disappointing that I’m not getting any answer regarding it while I’m just using the TI code.
With minor changes.