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MSP430F2002 stop DCO problem while using VLO

Igor Radutnuy
Prodigy 150 points
Other Parts Discussed in Thread: MSP430F2002, MSP430F1101

For some reason cannot stop DCO while using VLO

BCSCTL3 |= LFXT1S_2;

BCSCTL2 |= SELM_3 + DIVM_1;

__bis_SR_register(SCG1 + SCG0); - this command does not work.

  • 0
    Guru 227245 points

    SMCLK is still on DCO.

    From users guide:

    SCG0 System clock generator 0. When set, turns off the DCO dc generator, if DCOCLK is not used for MCLK or SMCLK.

  • 0 in reply to Jens-Michael Gross
    Prodigy 150 points

    MCLK is using VLO, Timer is clocked by VLO too - both statements are verified. Goal is to achieve tens of microamps current consumption, nothing else is connected.

    Current is around 180uA no matter how timer is clocked via DCO - SMCLK or VLO - ACLK (verified by checking output frequencies in both cases).

    There is no difference with or without  __bis__SR_register(SCG0 + SCG1) command line.

    My conclusion about DCO running in both case came from the same current consumption and no impact after SCG0/SCG1 setting.     

  • 0 in reply to Igor Radutnuy
    Guru 227245 points

    Yes. That's what I wrote. As long as SMCLK still requires DCO, setting SCG0 has no effect and DCO remains active. You need to switch SMCLK to VLO too and then DCO can be deactivated by SCG0.

    Setting both, SCG0 and SCG1 should switch SMCLK off and allow DCO to be shut down too. However, SMCLK cannot be disabled if anyone is still using it (SMCLK_request). Fig. 5-5 in the users guide shows that an SMCLK request (by any peripheral module) overrides the SCG0 and SCG1 bits.

  • 0 in reply to Jens-Michael Gross
    Prodigy 150 points

    Ok, I have tried the following:

    BCSCTL3 |= LFXT1S_2;                                                          // ACLK=VLOCLK

    BCSCTL2 |= SELM_3 + DIVM_1 + SELS + DIVS_3;          // MCLK=VLOCLK/2, SMCLK=VLOCLK/8 

    __bis_SR_register(SCG1 + SCG0);                                    // stop DCO

    TACTL = TASSEL_1 + MC_1;                                                // ACLK, UP mode

    Still 180uA consumption.

  • 0 in reply to Igor Radutnuy
    Guru 227245 points

    That's strange.

    Maybe DCO is off and the current is consumed by something else?
    Unconnected (floating) input pins will draw lots of cross-currents if the input voltage is near the transition voltage. ULP advisor suggests putting all unused port pins to low output.
    Also, even though ACLK is sourced by VLO, the XT1 circuit may still try to fire-up the XT1 crystal. YOu should also set the OSCOFF bit to really switch the oscillator off.

  • 0 in reply to Jens-Michael Gross
    Prodigy 150 points

    Still there,  solid 180uA.

    All  P1 and P2  pins are connected: 3 P1 pins are configured as inputs and pulled up, the rest of are configured as outputs; P2 pins are configured as outputs. Touching any GPIOs does not change current, usually it will change if pin is floating. 

    P1DIR |= 0x7C;

    P1REN |= 0x83;

    P1IES |= 0x83;

    P1IE |= 0x83;

    P1SEL |= 0x04;

    P2DIR |= 0xC0;

    P2SEL &= ~(0xC0);

    P2OUT = 0x00;

    OSCOFF killed everything since it controls VLOCLK (5.2.2) 

  • 0 in reply to Igor Radutnuy
    Guru 227245 points

    Igor Radutnuy said:
    OSCOFF killed everything since it controls VLOCLK (5.2.2) 

    Ah, you're right, on 2x family, VLO is a direct replacement for LFXT1, as 2x family doesn't have REFO.
    On 5x family, VLO is always on if used and not influenced by OSCOFF. The fallback (and replacement) for LFXT1 is the 32768Hz REFO.

    Igor Radutnuy said:
    Touching any GPIOs does not change current, usually it will change if pin is floating. 

    Not necessarily. The problem with floating pins is that if the input voltage is near the input gate level transition voltage, there will be significant cross-currents through the input gate transistors. These are independent of any leakage current in or out the pin. THis also happens if you oput out your ADC reference externally and then switch the reference off. The slowly lowering voltage on the external reference capacitors will eventually reach teh critical level and suddenly current consumption on the (sleeping) MSP begins to rise and hten falls again some time after..
    However, since your current is ratehr constant, the reason must be something different.

  • 0 in reply to Jens-Michael Gross
    Prodigy 150 points

    After weekend investigations I am now down to 100uA by reducing CPU clock (ACLK/8). Used blocks are: counting down CPU and timer A (also clocked by ACLK/8). Seems DCO is off because it consumes by itself around 200uA per specifications. Now I am wondering what is the lowest achievable current consumption for CPU clocked out by VLO? Same question for timer.

    Regards.

  • 0 in reply to Igor Radutnuy
    Guru 227245 points

    Igor Radutnuy said:
    reducing CPU clock (ACLK/8)

    ??? CPU runs from MCLK and is independent of ACLK (even though both can be source by the same oscillator).
    However, current drop on reduced ACLK speed seesm to indicate that there is something still running on ACLK that consumes some current. Do you have ACLK output enabled (for measuring it) and there is some load on that pin (even an external counter input may draw some µA, especially if it is TTL)

  • 0 in reply to Jens-Michael Gross
    Prodigy 150 points

    Yes, MCLK = ACLK and then I have changed MCLK divider.

    I build separate HW setup for current consumption investigation, only reset pin is connected to VDD and P1.1,2,7 connected to buttons.

    It would be helpful to know bottom line of current consumption in VLO mode, I could not find any document about, also MSPs are advertised to have lowest power consumption.  

  • 0 in reply to Igor Radutnuy
    Guru 227245 points

    Igor Radutnuy said:
    I could not find any document about, also MSPs are advertised to have lowest power consumption.  

    Well, I more than once explained that low power consumption isn't a matter of 'I want it to be that low' but of 'I need this featuer and don't need that'.
    You can create any number fo constellations and specify the consumed power for this case, there will be always someone with a different setup who doesn't find 'his' situation listed.
    To say 'MSP is lowest power consumption' it is sufficient to list a case where it consumes less than all competitors. This isn't necessarily the lowest state possible nor the state required for your application.

    However, it should be possible to reproduce the values in the datasheet by reconstructing the specific parameters with which these values have been originally measured.

    Igor Radutnuy said:
    only reset pin is connected to VDD and P1.1,2,7 connected to buttons.

    What about pullups on the button pins? If present, then maximum curent on these three pions should be 150pA leakage.

    Igor Radutnuy said:
    Yes, MCLK = ACLK and then I have changed MCLK divider.

    Well MCLK and ACLK are parallel and independent. You cannot set MCLK to ACLK. But you can set both, MCLK and ACLK to the same oscillator, what probably is what you meant.

    However, the datasheet lists 65µA for CPU active mode with DCO on at 100kHz. (fACLK = 0Hz, fMCLK=fSMCLK=fDCO(0,0)=100kHz)

    Well, teh dazasheet lists teh conditions for another state:

    fMCLK=fSMCLK=fACLK=32768Hz/8 = 4kHz:

    SELM_3, SELS, DIVM_3, DIVS_3, DIVA_3, SCG0=1, SCG0=0. CPU active. -> <7µA. Without crystal. VLO should be active. Power consumption might be a bit higher (since the oscillator will still try to fire up the crystal) but not too much (you may lower XT1 drive strength to minimum)

  • 0 in reply to Jens-Michael Gross
    Prodigy 150 points

    DCO mode is quite well characterized and reflected in datasheet, however VLO mode (featured as the lowest power consumption after crystal) is not. Power consumption must be clearly stated along with appropriate commands somewhere. I am RF guy and have moved in years around 30000 MSP430s, however never get attention from TI application support due to low volume I guess. All I need to know - are limits for VLO mode like 65uA @ 100kHz for DCO mode.

    SELM_3, SELS, DIVM_3, DIVS_3, DIVA_3, SCG0=1, SCG0=0. CPU active. -> <7µA.  Have tried this, still 100uA.



  • 0 in reply to Igor Radutnuy
    Guru 227245 points

    Igor Radutnuy said:
    VLO mode (featured as the lowest power consumption after crystal) is not.

    VLO ranges between 4 and 20kHz, and power consumption of VLO-driven CPU will change with it. So no specific value can be given. Originally VLO isn't meant to drive the CPU but to provide an emergency clock when the CPU is on sleep and nothing else is there to wake it.
    However, all whining is futile - the datasheets contain the info they contain. Not more and not less.

    The question remains: why isn't your current as low as it should. I don't know. It maybe a detail you didn't notice as important and I don't know and do not imagine as being possibly important. Without having your hardware on my desk (which is full with my own hardware), I have no more ideas. Sorry.

  • 0 in reply to Jens-Michael Gross
    Prodigy 150 points

    Please don't be sorry, you gave me a lot of vary valuable recommendations and my project is almost completed besides battery definition for required 1 year operation. 

    MSP430F2002 is mainly in LPM4 (super mode, nA consumption) and wakes up upon button interrupt, then it counts down till next sleep at the same time running timer. I cannot use crystal per mechanical requirements, however for other applications it is quite attractive. 

    I can send hardware (will be less on my bench) which has following connections:

    pin 1 - VDD, 1uF to ground,

    pins 2,3,9 - switch buttons in in parallel with 1 uF to ground,

    pin 4 - NC (timer out),

    pins 5,6,7,8 - NC (outputs),

    pin 10 - 47k to VDD,

    pin 11 - NC,

    pins 12,13 - NC (outputs),

    pin 14 - GND

    After programming I measure voltage drop on 10 Ohm resistor in VDD path.

     

  • 0 in reply to Igor Radutnuy
    Guru 227245 points

    Igor Radutnuy said:
    pin 1 - VDD, 1uF to ground,

    This isn't really much. When MSP wakes from LPM, there is a sudden change in current consumption which may drain the capacitor instantly. On 1µF, 1mA will drain it by 1V within 1ms. And the supply will possibly not be able to ramp up again fast enough.

    Igor Radutnuy said:
    pins 2,3,9 - switch buttons in in parallel with 1 uF to ground,

    Pullup resistors? What about leakage currents of the capacitors? usually, 100nF ceramic ones are good enough.

    Igor Radutnuy said:
    After programming I measure voltage drop on 10 Ohm resistor in VDD path.

    How?

    Igor Radutnuy said:
    my project is almost completed besides battery definition for required 1 year operation. 

    Well, if you can't get the current smaller, make the battery bigger :) Just a joke.

    Well, one yerar is (rounded up) 9000 hours of operation. That means a plain vanilla 1800mA AA (or a good AAA) battery is good for one year at an average current of 200µA.

  • 0 in reply to Jens-Michael Gross
    Prodigy 150 points

    Never had interrupt wake up problem with 1uF on VDD for MSP430F1101, 2001, 2002 powered by various Li cells.

    Internal pull up resistors with ceramic 1 uF capacitors work well - with my setup I cannot measure any leakage current in LPM4 mode.

    After programming I disconnect test board from FET debugger and measure voltage drop while powering from coin cell.

    I like bigger batteries myself, however coin cell is must for this project.  

  • 0 in reply to Igor Radutnuy
    Guru 227245 points

    Igor Radutnuy said:
    coin cell is must for this project

    What about using alkaline zinc air batteries? Twice the punch for the same size. I use dthem once for my RTC modules for the C64. I got quesitons about how to replace it, many years after I stopped manufacturing these modules. Well, I used a germanium diode (its leakage current) as charge regulator when the supply was on. Zinc-air batteries are partially rechargable too.

    Igor Radutnuy said:
    Never had interrupt wake up problem with 1uF on VDD for MSP430F1101, 2001, 2002 powered by various Li cells.

    Well, LI cells are low impedance enough to have no problems with a sudden current increase, simple alcaline con cells might. However, you're right that 1x and 2x family with their VCC-driven core migh tnot need so much capacitance. 5x family with its internal core voltage regulator requires at least 4,7µF as the very minimum.

    Igor Radutnuy said:
    After programming I disconnect test board from FET debugger and measure voltage drop while powering from coin cell

    Well, it would be nice to know where the current actually flows. Maybe you're looking into the completely wrong direction. You could try a bare MSP with nothing else on the board (except the cap on the supply). No resistors, no other caps, nothing else.

  • 0
    Prodigy 230 points

    To source MCLK from VLO you need to clear OFIFG flag. See "5.2.7.1 Sourcing MCLK from a Crystal" in family guide.

  • 0 in reply to Victor1
    Guru 227245 points

    That’s a good point, Victor. This might indeed be the reason. On 5x family, VLO has no fault flag and switching to it is always successful. But on 2x family, VLO is just a “poor man’s XT1 crystal” and fault handling is the same as for the real XT1 (and since using XT1 is the default, there is a default-fault at startup)

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