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msp430f5438 interrupt problem with p1.0 and dma

HI

My  external AD-converter generates data ready interrupt on p1.0 After interrupt I read the conversation result over SPI.  I am trying to use DMA1 and DMA2 on SPI transmission. DMA1 is triggered on USC1A0RXIFG and DMA2 on USCIA0TXIFG. DMA1 generates a DMA interrupt when ready.


My problem is that DMA interrupt isn't genrated when I keep p1.0 interrupt always enabled. If I disable the p1.0 interrupt on P1IE until dma interrupt is generated everything works fine on MCU but there will be issues on AD-converter.

Is there any limitations on MCU that I should know or is it just my code? I also tried to replace DMA1 with DMA0 without any good results.

  • Do you properly clear P1IFG.BIT0 when you handle the P1 interrupt? If not, this ISR will be called over and over again and if it has priority over DMA Interrupt (see datasheet, interrupt vectors and priorities), then the DMA ISR is never called (and also main will never continue doing anything).

  • Thanks for the reply. That is very well known behaviour and mistake for me and at this time it can't be that one because I think the rest of my application including several functionalities works properly regardless of P1.0 interrupt.

  • Personally, I don't understand why there should be a problem with disabling the P1 interrupts during transfers. Maybe you should specify the type of ADC you're using, but most of the ones I know signal the completion of all channels requested, for example, so no intermediate trigger should occur.

    If your P1 ISR does nothing except setting DMAREQ, it should work unless you're getting additional triggers during runtime (which would lead to premature loading of the TX register) that will screw up your transfers, because your RX DMA counter won't be at 0 when you TX'd everything.

    If your P1 ISR is also configuring DMA transfers or resetting them and your SPI speed is too slow for example, you may never get to the end of a block transfer, hence no DMA interrupt.

  • Michael, I second what you wrote. For further analysis, a look at the code would be necessary.

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