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BSL Timing Requirements

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The programming user's guide, SLAU265 Figure 2-2, does not give specific timing requirements for entering & programming the BSL.

The timing needed for invoking the BSL is not critical. There is some simple internal logic that decodes the logic pattern applied to the pins. Assuming that this logic functions similar than the rest of the MSP430 internals, I would say that assuming a time unit of 125ns (MINIMUM) is safe. Note that there is no maximum timing specification. As the logic operates state-oriented, you can take as much time as you want to execute the sequence. This logic operates independent of the DCO.

Also note that most likely there will be capacitance provided on the reset pins. This fact itself limits the minimum times you can drive anyways. Depending on your RST line drive strength, and the reset R/C combination, you need to make sure that the proper voltage levels can be reached within your time periods. So the clear recommendation would be to do this entry sequence somewhat slower than the minimum timing that I indicated.

William Cooper, Product Marketing Engineer for the MSP Business Unit at Texas Instruments

  • One other note - check the errata for your specific device. There are a few devices where this sequence is timing critical, see the SYS10 erratum on MSP430F5438A. This has been fixed in newer revisions but it is just something to be aware of.

    Regards,

    Katie

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