• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 78 subscribers
  • Views 497 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SMCLK USCI SPI master while in LPM3 mode

Tony Philipsson
Guru 12050 points

I though that I maybe could only go to LMP1 while doing intermittent SPI master routines 
DCO>SMCLK>BR0(2) = 500KHz

But it still works while I'm at LPM3 and I must be due to that it's the IRQ that keeps feeding it's own
TXBUF and while the IRQ is running it of course it  have all clocks active.
 
But when I exit it must be that DCO keeps running until SPI had a chance to shift out all its bits.

But is there any risk with this DCO on/off for every char that I send?

  • 0
    Guru 227245 points

    AFAIK, the USCI requests its clock only if it is needed.

    It is needed if something is to be sent or if a start condition was detected in UART mode. Once the transfer is done, the clock request is removed.
    A clock request will activate a deactivated clock (by LPM) or keep it running when LPM is entered. If the clock is source by DCO or by a crystal, DCO or Crystal are kept active.

    Don’t see ‘LPMx’ as a monolithic switch. It is rather a combination of hints to the core that influences but not completely controls the activation and deactivation of part of the clock system. But other criteria also influence the result.
    You can deactivate the unconditional clock request feature in the clock module (giving the LPM mode precedence over the module needs). By default, it is active and a module requiring a clock has precedence over LPM.

**Attention** This is a public forum