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diffrence between ADC12 registers

hi,

can you plz explain me the difference between 

#define ADC12SHT00 (0x0100u) /* ADC12 Sample Hold 0 Select Bit: 0 */
#define ADC12SHT01 (0x0200u) /* ADC12 Sample Hold 0 Select Bit: 1 */
#define ADC12SHT02 (0x0400u) /* ADC12 Sample Hold 0 Select Bit: 2 */
#define ADC12SHT03 (0x0800u) /* ADC12 Sample Hold 0 Select Bit: 3 */
#define ADC12SHT10 (0x1000u) /* ADC12 Sample Hold 1 Select Bit: 0 */
#define ADC12SHT11 (0x2000u) /* ADC12 Sample Hold 1 Select Bit: 1 */
#define ADC12SHT12 (0x4000u) /* ADC12 Sample Hold 1 Select Bit: 2 */
#define ADC12SHT13 (0x8000u) /* ADC12 Sample Hold 1 Select Bit: 3 */

AND

#define ADC12SHT00_H (0x0001u) /* ADC12 Sample Hold 0 Select Bit: 0 */
#define ADC12SHT01_H (0x0002u) /* ADC12 Sample Hold 0 Select Bit: 1 */
#define ADC12SHT02_H (0x0004u) /* ADC12 Sample Hold 0 Select Bit: 2 */
#define ADC12SHT03_H (0x0008u) /* ADC12 Sample Hold 0 Select Bit: 3 */
#define ADC12SHT10_H (0x0010u) /* ADC12 Sample Hold 1 Select Bit: 0 */
#define ADC12SHT11_H (0x0020u) /* ADC12 Sample Hold 1 Select Bit: 1 */
#define ADC12SHT12_H (0x0040u) /* ADC12 Sample Hold 1 Select Bit: 2 */
#define ADC12SHT13_H (0x0080u) /* ADC12 Sample Hold 1 Select Bit: 3 */

AND

#define ADC12SHT0_0 (0*0x100u) /* ADC12 Sample Hold 0 Select Bit: 0 */
#define ADC12SHT0_1 (1*0x100u) /* ADC12 Sample Hold 0 Select Bit: 1 */
#define ADC12SHT0_2 (2*0x100u) /* ADC12 Sample Hold 0 Select Bit: 2 */
#define ADC12SHT0_3 (3*0x100u) /* ADC12 Sample Hold 0 Select Bit: 3 */
#define ADC12SHT0_4 (4*0x100u) /* ADC12 Sample Hold 0 Select Bit: 4 */
#define ADC12SHT0_5 (5*0x100u) /* ADC12 Sample Hold 0 Select Bit: 5 */
#define ADC12SHT0_6 (6*0x100u) /* ADC12 Sample Hold 0 Select Bit: 6 */
#define ADC12SHT0_7 (7*0x100u) /* ADC12 Sample Hold 0 Select Bit: 7 */
#define ADC12SHT0_8 (8*0x100u) /* ADC12 Sample Hold 0 Select Bit: 8 */
#define ADC12SHT0_9 (9*0x100u) /* ADC12 Sample Hold 0 Select Bit: 9 */
#define ADC12SHT0_10 (10*0x100u) /* ADC12 Sample Hold 0 Select Bit: 10 */
#define ADC12SHT0_11 (11*0x100u) /* ADC12 Sample Hold 0 Select Bit: 11 */
#define ADC12SHT0_12 (12*0x100u) /* ADC12 Sample Hold 0 Select Bit: 12 */
#define ADC12SHT0_13 (13*0x100u) /* ADC12 Sample Hold 0 Select Bit: 13 */
#define ADC12SHT0_14 (14*0x100u) /* ADC12 Sample Hold 0 Select Bit: 14 */
#define ADC12SHT0_15 (15*0x100u) /* ADC12 Sample Hold 0 Select Bit: 15 */

AND

#define ADC12SHT1_0 (0*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 0 */
#define ADC12SHT1_1 (1*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 1 */
#define ADC12SHT1_2 (2*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 2 */
#define ADC12SHT1_3 (3*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 3 */
#define ADC12SHT1_4 (4*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 4 */
#define ADC12SHT1_5 (5*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 5 */
#define ADC12SHT1_6 (6*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 6 */
#define ADC12SHT1_7 (7*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 7 */
#define ADC12SHT1_8 (8*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 8 */
#define ADC12SHT1_9 (9*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 9 */
#define ADC12SHT1_10 (10*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 10 */
#define ADC12SHT1_11 (11*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 11 */
#define ADC12SHT1_12 (12*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 12 */
#define ADC12SHT1_13 (13*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 13 */
#define ADC12SHT1_14 (14*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 14 */
#define ADC12SHT1_15 (15*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 15 */

can i replace one set of registers with another.

thank you

  • Hi,

    For this you need to refer to the MSP430F5xx UG: www.ti.com/lit/slau208n - Table 28-4. "ADC12CTL0 Register Description"

    pratap yenubari said:

    #define ADC12SHT00 (0x0100u) /* ADC12 Sample Hold 0 Select Bit: 0 */
    #define ADC12SHT01 (0x0200u) /* ADC12 Sample Hold 0 Select Bit: 1 */
    #define ADC12SHT02 (0x0400u) /* ADC12 Sample Hold 0 Select Bit: 2 */
    #define ADC12SHT03 (0x0800u) /* ADC12 Sample Hold 0 Select Bit: 3 */
    #define ADC12SHT10 (0x1000u) /* ADC12 Sample Hold 1 Select Bit: 0 */
    #define ADC12SHT11 (0x2000u) /* ADC12 Sample Hold 1 Select Bit: 1 */
    #define ADC12SHT12 (0x4000u) /* ADC12 Sample Hold 1 Select Bit: 2 */
    #define ADC12SHT13 (0x8000u) /* ADC12 Sample Hold 1 Select Bit: 3 */

    These are the bit values of ADC12SHT0x and ADC12SHT0x in a 16 bit value. Personally i don't really find this is useful, except if you want to do bit manipulation which is really rare for peripheral other than GPIO. 

    -------------------------------------------------------------------------------------------------------------------

    pratap yenubari said:

    #define ADC12SHT00_H (0x0001u) /* ADC12 Sample Hold 0 Select Bit: 0 */

    #define ADC12SHT01_H (0x0002u) /* ADC12 Sample Hold 0 Select Bit: 1 */
    #define ADC12SHT02_H (0x0004u) /* ADC12 Sample Hold 0 Select Bit: 2 */
    #define ADC12SHT03_H (0x0008u) /* ADC12 Sample Hold 0 Select Bit: 3 */
    #define ADC12SHT10_H (0x0010u) /* ADC12 Sample Hold 1 Select Bit: 0 */
    #define ADC12SHT11_H (0x0020u) /* ADC12 Sample Hold 1 Select Bit: 1 */
    #define ADC12SHT12_H (0x0040u) /* ADC12 Sample Hold 1 Select Bit: 2 */
    #define ADC12SHT13_H (0x0080u) /* ADC12 Sample Hold 1 Select Bit: 3 */

    These are the bit values of ADC12SHT0x and ADC12SHT0x but in 8 bit value of the ADC12CTL0 register upper byte. But again, usually you don't need these.

    -------------------------------------------------------------------------------------------------------------------

    pratap yenubari said:

    #define ADC12SHT0_0 (0*0x100u) /* ADC12 Sample Hold 0 Select Bit: 0 */
    #define ADC12SHT0_1 (1*0x100u) /* ADC12 Sample Hold 0 Select Bit: 1 */
    #define ADC12SHT0_2 (2*0x100u) /* ADC12 Sample Hold 0 Select Bit: 2 */
    #define ADC12SHT0_3 (3*0x100u) /* ADC12 Sample Hold 0 Select Bit: 3 */
    #define ADC12SHT0_4 (4*0x100u) /* ADC12 Sample Hold 0 Select Bit: 4 */
    #define ADC12SHT0_5 (5*0x100u) /* ADC12 Sample Hold 0 Select Bit: 5 */
    #define ADC12SHT0_6 (6*0x100u) /* ADC12 Sample Hold 0 Select Bit: 6 */
    #define ADC12SHT0_7 (7*0x100u) /* ADC12 Sample Hold 0 Select Bit: 7 */
    #define ADC12SHT0_8 (8*0x100u) /* ADC12 Sample Hold 0 Select Bit: 8 */
    #define ADC12SHT0_9 (9*0x100u) /* ADC12 Sample Hold 0 Select Bit: 9 */
    #define ADC12SHT0_10 (10*0x100u) /* ADC12 Sample Hold 0 Select Bit: 10 */
    #define ADC12SHT0_11 (11*0x100u) /* ADC12 Sample Hold 0 Select Bit: 11 */
    #define ADC12SHT0_12 (12*0x100u) /* ADC12 Sample Hold 0 Select Bit: 12 */
    #define ADC12SHT0_13 (13*0x100u) /* ADC12 Sample Hold 0 Select Bit: 13 */
    #define ADC12SHT0_14 (14*0x100u) /* ADC12 Sample Hold 0 Select Bit: 14 */
    #define ADC12SHT0_15 (15*0x100u) /* ADC12 Sample Hold 0 Select Bit: 15 */

    These are the bit field values of ADC12SHT0x which you shall use in your application. For example if you want to use 128 ADC12CLK cycles (according to the UG it shall be 0110 binary - 6 decimal) for ADC12SHT0x, you can just do:

    ADC12CTL0 = ADC12SHT0_6;

    -------------------------------------------------------------------------------------------------------------------

    pratap yenubari said:

    #define ADC12SHT1_0 (0*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 0 */
    #define ADC12SHT1_1 (1*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 1 */
    #define ADC12SHT1_2 (2*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 2 */
    #define ADC12SHT1_3 (3*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 3 */
    #define ADC12SHT1_4 (4*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 4 */
    #define ADC12SHT1_5 (5*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 5 */
    #define ADC12SHT1_6 (6*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 6 */
    #define ADC12SHT1_7 (7*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 7 */
    #define ADC12SHT1_8 (8*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 8 */
    #define ADC12SHT1_9 (9*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 9 */
    #define ADC12SHT1_10 (10*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 10 */
    #define ADC12SHT1_11 (11*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 11 */
    #define ADC12SHT1_12 (12*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 12 */
    #define ADC12SHT1_13 (13*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 13 */
    #define ADC12SHT1_14 (14*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 14 */
    #define ADC12SHT1_15 (15*0x1000u) /* ADC12 Sample Hold 1 Select Bit: 15 */

    This is the same as the previous one (bit fields value) but for ADC12SHT1x. So use this one also in your code to make it easier to read.

  • pratap yenubari said:
    can you plz explain me the difference between 

    First are the bits for the ADC12SHT0 and SHT1 field, when accessing the control register in word mode, second are the same bits when accessing the high-byte of the register in byte mode. Third and fourth are the enumerated values of the SHT0 and SHT1 field.

    ADC12SHT0_1 == ADC12SHT00
    ADC12SHT0_3 == ADC12SHT00 | ADC12SHT01

    You’ll find a similar construct for all defines that refer to bitfields in MSP control registers.
    Without underscores, they are bits, with underscore followed by a number, they are enumerated values. And two underscores with a number (or one followed by a text) mean individual settings that have the meaning of the trailing number (e.g. for dividers) or the text.
    Usually, the versions with underscores are used, as they are easier to read.
    Well, the defines could use definitions like I did above, to make the relation more clear. But once you know it...

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