Hi,
I am trying to enable an I2C slave on a TI launchpad with an msp430 f5529 with ucs_b1.
The slave is working properly for all pins except the default mapped ones: pin 4.1 and 4.2.
I am using an arduino uno as I2C master with pullups on the SDA and SCL to 3.3 v. (and connected the ground as well).
Below is a code snipped of how I map those pins (based on the USC_B0 example from TI). I have really no clue why I am not able to use pin 1 and 2 of port 4. I tried now on 2 different lauchpads to rule out hardware issues but no success so far.
//******************************************************************************
// Built with CCSv6
//******************************************************************************
#include <msp430f5529.h>
//#define MAPSDASLAVE1 P4MAP1
//#define MAPSCLSLAVE1 P4MAP2
#define MAPSDASLAVE1 P4MAP0
#define MAPSCLSLAVE1 P4MAP3
//#define MAPSDASLAVE1 P4MAP4
//#define MAPSCLSLAVE1 P4MAP5
void Port_Mapping(void);
// i2c transmit data
unsigned char *PTxData; // Pointer to TX data
const unsigned char TxData[] = // Table of data to transmit
{
0x24,
0x30,
0x31,
0x32,
0x33,
0x34,
0x35,
0x30,
0x31,
0x32,
0x33,
0x34,
0x35,
0x30,
0x31,
0x32,
0x33,
0x34,
0x35,
0x30,
0x31,
0x32,
0x33,
0x34,
0x35
};
int main(void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop WDT
Port_Mapping();
P4DIR |= 0xFF; // P4.0 - P4.7 output
P4SEL |= 0xFF; // P4.0 - P4.6 Port Map functions
UCB1CTL1 |= UCSWRST; // Enable SW reset
UCB1CTL0 = UCMODE_3 + UCSYNC; // I2C Slave, synchronous mode
UCB1I2COA = 0x48; // Own Address is 048h
UCB1CTL1 &= ~UCSWRST; // Clear SW reset, resume operation
UCB1IE |= UCTXIE + UCSTPIE + UCSTTIE+ UCRXIE; // Enable STT and STP interrupt
while (1)
{
PTxData = (unsigned char *)TxData; // Start of TX buffer
__bis_SR_register(LPM0_bits + GIE); // Enter LPM0, enable interrupts
// Remain in LPM0 until master
// finishes RX
__no_operation(); // Set breakpoint >>here<< and
} // read out the TXByteCtr counter
}
// PORT mapping
void Port_Mapping(void)
{
// unsigned char i;
// volatile unsigned char *ptr;
__disable_interrupt(); // Disable Interrupts before altering Port Mapping registers
PMAPPWD = 0x02D52; // Enable Write-access to modify port mapping registers
#ifdef PORT_MAP_RECFG
PMAPCTL = PMAPRECFG; // Allow reconfiguration during runtime
#endif
MAPSDASLAVE1 = PM_UCB1SDA;
MAPSCLSLAVE1 = PM_UCB1SCL;
PMAPPWD = 0; // Disable Write-Access to modify port mapping registers
#ifdef PORT_MAP_EINT
__enable_interrupt(); // Re-enable all interrupts
#endif
}
//------------------------------------------------------------------------------
// The USCI_B0 data ISR TX vector is used to move data from MSP430 memory to the
// I2C master. PTxData points to the next byte to be transmitted, and TXByteCtr
// keeps track of the number of bytes transmitted.
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
// The USCI_B0 state ISR TX vector is used to wake up the CPU from LPM0 in order
// to do processing in the main program after data has been transmitted. LPM0 is
// only exit in case of a (re-)start or stop condition when actual data
// was transmitted.
//------------------------------------------------------------------------------
#pragma vector = USCI_B1_VECTOR
__interrupt void USCI_B1_ISR(void)
{
switch(__even_in_range(UCB1IV,12))
{
case 0: break; // Vector 0: No interrupts
case 2: break; // Vector 2: ALIFG
case 4: break; // Vector 4: NACKIFG
case 6: // Vector 6: STTIFG
UCB1IFG &= ~UCSTTIFG; // Clear start condition int flag
break;
case 8: // Vector 8: STPIFG
UCB1IFG &= ~UCSTPIFG; // Clear stop condition int flag
__bic_SR_register_on_exit(LPM0_bits); // Exit LPM0 if data was transmitted
break;
case 10: // Vector 10: RXIFG
break;
case 12: // Vector 12: TXIFG
UCB1TXBUF = *PTxData++; // Transmit data at address PTxData
break;
default: break;
}
}
For your information: I have also tried with driverlib and I have exactly the same isue (all pins are useable for I2C slave exect P4.1 and 4.2)
