Dear all,
I'm trying to get I2C and SPI working on a CC430F5133. I successfully set up and tested I2C on UCB0. I then continued on adding SPI on UCA0 (both implementations base on the examples from TI).
I first initialize I2C, then SPI in my code, then write something over I2C and then (try to) write something over SPI.
Now, while both initializations work, the SPI-TXIFG is set to 0 as soon as I write something over I2C - and it just stays 0 (i.e. it won't become 1 after the I2C-write is done).
Is this a known problem or am I just doing something wrong?
Thanks in advance
Sebastian
I2C-Init:
void initI2C() { P1SEL |= BIT2 + BIT3; UCB0CTL1 |= UCSWRST; UCB0CTL0 = UCMST + UCMODE_3 + UCSYNC; UCB0CTL1 = UCSSEL_2 + UCSWRST; UCB0BR0 = 3; // fSCL = SMCLK/12 = ~100kHz, /3 = ~400kHz UCB0BR1 = 0; UCB0CTL1 &= ~UCSWRST; }
SPI-Init:
void initSPI() { P1SEL |= BIT1 + BIT5 + BIT7; UCA0CTL1 |= UCSWRST; // Put in reset UCA0CTL0 |= UCMST+UCSYNC+UCCKPL+UCMSB; // 3-pin, 8-bit SPI master, Clock polarity high, MSB first UCA0CTL1 |= UCSSEL_2; // SMCLK UCA0BR0 = 1; // SMCLK / (BR1 * 256 + BR0) UCA0BR1 = 0; UCA0MCTL = 0; // No modulation UCA0CTL1 &= ~UCSWRST; // Activate }
I2C-write:
void i2c_write(unsigned char counter, unsigned char * txData, unsigned char stop) { UCB0IE |= UCTXIE | 0x3F; // Enable interrupt on TX i2cStopAfter = stop; i2cTxCounter = counter; i2cTxPointer = (unsigned char *)txData; while(UCB0CTL1 & UCTXSTP); // Send data UCB0CTL1 |= UCTR | UCTXSTT; // I2C TX, I2C start condition // Wait till data is sent __bis_SR_register(LPM0_bits + GIE); i2cStopAfter = 0; UCB0IE &= ~UCTXIE; // Disable interrupt on TX } (plus some code in the ISR which is close to the examples)
SPI-write:
void stripe_sendData(unsigned char * txData) { // must always be 32 bytes UCA0IE |= UCTXIE; while (!(UCA0IFG&UCTXIFG)); // USCI_A0 TX buffer ready? spiTxCounter = 32; spiTxPointer = (unsigned char *)txData; UCA0TXBUF = *spiTxPointer++; // Transmit first character __bis_SR_register(LPM0_bits + GIE); // CPU off, enable interrupts UCA0IE &= ~UCTXIE; } (again, plus some code in the ISR which is similiar to what's in the examples)