Hello,
I'm also using the MSP430F5419A and want to load my custom BSL.
I have problems with the linker cmd file in CCS. Could you post me how you modivied it for your bsl-application? Or maybe post the file directly?
Thx, Hans
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Hello,
I'm also using the MSP430F5419A and want to load my custom BSL.
I have problems with the linker cmd file in CCS. Could you post me how you modivied it for your bsl-application? Or maybe post the file directly?
Thx, Hans
Oh and should add that i want to adapt the MSP430F5438A_BSL that i found in the SLAA450_custom_BSL.zip in the folder 5xx_6xx_Example_BSL_Source to my MSP430F5419A.
I allready trieded to modify the linker cmd accordingly to the slaa450c 2.3.1.2 and it did not work.
CCS tells me when loading:
MSP430: File Loader: Data verification failed at address 0x00000000 Please verify target memory and memory map.
MSP430: GEL: File: D:\johannS\workspace_v5_3\CUSTOM_BSL\BSL\BSL.out: a data verification error occurred, file load failed.
Hi Hans,
This post might help: http://e2e.ti.com/support/microcontrollers/msp430/f/166/p/246869/1176418.aspx#1176418
You should work from the CCS example code provided in the SLAA450 download inside the folder SLAA450/5xx_6xx_Example_BSL_Source. There is a single example in there and it for F5438A UART BSL in CCS. It includes a modified version of the F5438A linker command file in this project.
What I would do would be to import this example into CCS. As you can see, the project is already building for F5418A which is very similar to your part. You should be able to just use this as is, telling it to ignore the warning - the reason the F5418A linker is used is that it is the smallest device variant in the family - so this is used even when building for F5438A.
If you want to build specifically for your device though (F5419A), you can look at this modified F5418A linker file that comes with the project download, and then add all of the modifications from it into the F5419A linker file. Hope this helps get you started.
You may also want to see this on how to open BSL area for modification in CCS: http://processors.wiki.ti.com/index.php/MSP430_FAQ#How_to_enable_the_access_to_BSL_Flash_memory_in_MSP430F5xx.2F6xx_devices_.3F
Regards,
Katie
Hi Katie,
thank you for your posts. they were helpful :)
But I'm still having still trouble with uploading my code to the MSP430F5419A:
So i better start to tell you what i did:
1) i created a new project for my device and configured the project with the correct download options like: check for Allow Read/... to BSL memory, erase main, info and protected info memory and copied the files from 5xx_6xx_Example_BSL_Source (i even tried the optimisation that was mentioned in an other post)
2) Modified the created linker file from CCS accordingly to the Slau208n
Here is my linker file:
/******************************************************************************/ /* lnk_msp430f5419a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5419A PROGRAMS */ /* */ /* Usage: lnk430 <obj files...> -o <out file> -m <map file> lnk.cmd */ /* cl430 <src files...> -z -o <out file> -m <map file> lnk.cmd */ /* */ /*----------------------------------------------------------------------------*/ /* These linker options are for command line linking only. For IDE linking, */ /* you should set your linker options in Project Properties */ /* -c LINK USING C CONVENTIONS */ /* -stack 0x0100 SOFTWARE STACK SIZE */ /* -heap 0x0100 HEAP AREA SIZE */ /* */ /*----------------------------------------------------------------------------*/ /****************************************************************************/ /* SPECIFY THE SYSTEM MEMORY MAP */ /****************************************************************************/ MEMORY { SFR : origin = 0x0000, length = 0x0010 PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 RAM : origin = 0x1C00, length = 0x4000 /* INFOA : origin = 0x1980, length = 0x0080 INFOB : origin = 0x1900, length = 0x0080 INFOC : origin = 0x1880, length = 0x0080 INFOD : origin = 0x1800, length = 0x0080 */ BSL : origin = 0x1000, length = 0x07FE FLASH : origin = 0x5C00, length = 0xA380 FLASH2 : origin = 0x10000,length = 0x15C00 INT00 : origin = 0xFF80, length = 0x0002 INT01 : origin = 0xFF82, length = 0x0002 INT02 : origin = 0xFF84, length = 0x0002 INT03 : origin = 0xFF86, length = 0x0002 INT04 : origin = 0xFF88, length = 0x0002 INT05 : origin = 0xFF8A, length = 0x0002 INT06 : origin = 0xFF8C, length = 0x0002 INT07 : origin = 0xFF8E, length = 0x0002 INT08 : origin = 0xFF90, length = 0x0002 INT09 : origin = 0xFF92, length = 0x0002 INT10 : origin = 0xFF94, length = 0x0002 INT11 : origin = 0xFF96, length = 0x0002 INT12 : origin = 0xFF98, length = 0x0002 INT13 : origin = 0xFF9A, length = 0x0002 INT14 : origin = 0xFF9C, length = 0x0002 INT15 : origin = 0xFF9E, length = 0x0002 INT16 : origin = 0xFFA0, length = 0x0002 INT17 : origin = 0xFFA2, length = 0x0002 INT18 : origin = 0xFFA4, length = 0x0002 INT19 : origin = 0xFFA6, length = 0x0002 INT20 : origin = 0xFFA8, length = 0x0002 INT21 : origin = 0xFFAA, length = 0x0002 INT22 : origin = 0xFFAC, length = 0x0002 INT23 : origin = 0xFFAE, length = 0x0002 INT24 : origin = 0xFFB0, length = 0x0002 INT25 : origin = 0xFFB2, length = 0x0002 INT26 : origin = 0xFFB4, length = 0x0002 INT27 : origin = 0xFFB6, length = 0x0002 INT28 : origin = 0xFFB8, length = 0x0002 INT29 : origin = 0xFFBA, length = 0x0002 INT30 : origin = 0xFFBC, length = 0x0002 INT31 : origin = 0xFFBE, length = 0x0002 INT32 : origin = 0xFFC0, length = 0x0002 INT33 : origin = 0xFFC2, length = 0x0002 INT34 : origin = 0xFFC4, length = 0x0002 INT35 : origin = 0xFFC6, length = 0x0002 INT36 : origin = 0xFFC8, length = 0x0002 INT37 : origin = 0xFFCA, length = 0x0002 INT38 : origin = 0xFFCC, length = 0x0002 INT39 : origin = 0xFFCE, length = 0x0002 INT40 : origin = 0xFFD0, length = 0x0002 INT41 : origin = 0xFFD2, length = 0x0002 INT42 : origin = 0xFFD4, length = 0x0002 INT43 : origin = 0xFFD6, length = 0x0002 INT44 : origin = 0xFFD8, length = 0x0002 INT45 : origin = 0xFFDA, length = 0x0002 INT46 : origin = 0xFFDC, length = 0x0002 INT47 : origin = 0xFFDE, length = 0x0002 INT48 : origin = 0xFFE0, length = 0x0002 INT49 : origin = 0xFFE2, length = 0x0002 INT50 : origin = 0xFFE4, length = 0x0002 INT51 : origin = 0xFFE6, length = 0x0002 INT52 : origin = 0xFFE8, length = 0x0002 INT53 : origin = 0xFFEA, length = 0x0002 INT54 : origin = 0xFFEC, length = 0x0002 INT55 : origin = 0xFFEE, length = 0x0002 INT56 : origin = 0xFFF0, length = 0x0002 INT57 : origin = 0xFFF2, length = 0x0002 INT58 : origin = 0xFFF4, length = 0x0002 INT59 : origin = 0xFFF6, length = 0x0002 INT60 : origin = 0xFFF8, length = 0x0002 INT61 : origin = 0xFFFA, length = 0x0002 INT62 : origin = 0xFFFC, length = 0x0002 RESET : origin = 0xFFFE, length = 0x0002 } /****************************************************************************/ /* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ /****************************************************************************/ SECTIONS { .bss : {} > RAM /* GLOBAL & STATIC VARS */ .data : {} > RAM /* GLOBAL & STATIC VARS */ .sysmem : {} > RAM /* DYNAMIC MEMORY ALLOCATION AREA */ .stack : {} > RAM (HIGH) /* SOFTWARE SYSTEM STACK */ .text : {}>> FLASH | FLASH2 /* CODE ----------------------------- */ .text:_isr : {} > FLASH /* ISR CODE SPACE */ .cinit : {} > FLASH /* INITIALIZATION TABLES */ //#ifdef (__LARGE_DATA_MODEL__) .const : {} > FLASH | FLASH2 /* CONSTANT DATA */ //#else // .const : {} > FLASH /* CONSTANT DATA */ //#endif .cio : {} > RAM /* C I/O BUFFER */ .pinit : {} > FLASH /* C++ CONSTRUCTOR TABLES */ .init_array : {} > FLASH /* C++ CONSTRUCTOR TABLES */ .mspabi.exidx : {} > FLASH /* C++ CONSTRUCTOR TABLES */ .mspabi.extab : {} > FLASH /* C++ CONSTRUCTOR TABLES */ // .infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */ // .infoB : {} > INFOB // .infoC : {} > INFOC // .infoD : {} > INFOD bsl : {} > BSL /* BSL CODE */ /* MSP430 INTERRUPT VECTORS */ .int00 : {} > INT00 .int01 : {} > INT01 .int02 : {} > INT02 .int03 : {} > INT03 .int04 : {} > INT04 .int05 : {} > INT05 .int06 : {} > INT06 .int07 : {} > INT07 .int08 : {} > INT08 .int09 : {} > INT09 .int10 : {} > INT10 .int11 : {} > INT11 .int12 : {} > INT12 .int13 : {} > INT13 .int14 : {} > INT14 .int15 : {} > INT15 .int16 : {} > INT16 .int17 : {} > INT17 .int18 : {} > INT18 .int19 : {} > INT19 .int20 : {} > INT20 .int21 : {} > INT21 .int22 : {} > INT22 .int23 : {} > INT23 .int24 : {} > INT24 .int25 : {} > INT25 .int26 : {} > INT26 .int27 : {} > INT27 .int28 : {} > INT28 .int29 : {} > INT29 .int30 : {} > INT30 .int31 : {} > INT31 .int32 : {} > INT32 .int33 : {} > INT33 .int34 : {} > INT34 .int35 : {} > INT35 .int36 : {} > INT36 .int37 : {} > INT37 .int38 : {} > INT38 .int39 : {} > INT39 .int40 : {} > INT40 RTC : { * ( .int41 ) } > INT41 type = VECT_INIT PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT USCI_B3 : { * ( .int43 ) } > INT43 type = VECT_INIT USCI_A3 : { * ( .int44 ) } > INT44 type = VECT_INIT USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT DMA : { * ( .int50 ) } > INT50 type = VECT_INIT USCI_B2 : { * ( .int51 ) } > INT51 type = VECT_INIT USCI_A2 : { * ( .int52 ) } > INT52 type = VECT_INIT TIMER0_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT TIMER0_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT ADC12 : { * ( .int55 ) } > INT55 type = VECT_INIT USCI_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT USCI_A0 : { * ( .int57 ) } > INT57 type = VECT_INIT WDT : { * ( .int58 ) } > INT58 type = VECT_INIT TIMER0_B1 : { * ( .int59 ) } > INT59 type = VECT_INIT TIMER0_B0 : { * ( .int60 ) } > INT60 type = VECT_INIT UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT .reset : {} > RESET /* MSP430 RESET VECTOR */ } /****************************************************************************/ /* INCLUDE PERIPHERALS MEMORY MAP */ /****************************************************************************/ -l msp430f5419a.cmd
i also tried adapting the linker file from the 5xx_6xx_Example_BSL_Source like:
/* ============================================================================ */ /* Copyright (c) 2013, Texas Instruments Incorporated */ /* All rights reserved. */ /* */ /* Redistribution and use in source and binary forms, with or without */ /* modification, are permitted provided that the following conditions */ /* are met: */ /* */ /* * Redistributions of source code must retain the above copyright */ /* notice, this list of conditions and the following disclaimer. */ /* */ /* * Redistributions in binary form must reproduce the above copyright */ /* notice, this list of conditions and the following disclaimer in the */ /* documentation and/or other materials provided with the distribution. */ /* */ /* * Neither the name of Texas Instruments Incorporated nor the names of */ /* its contributors may be used to endorse or promote products derived */ /* from this software without specific prior written permission. */ /* */ /* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" */ /* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, */ /* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR */ /* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR */ /* CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, */ /* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, */ /* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; */ /* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, */ /* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR */ /* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ /* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ /* ============================================================================ */ /******************************************************************************/ /* lnk_msp430f5418a.cmd - LINKER COMMAND FILE FOR LINKING MSP430F5418A PROGRAMS */ /* */ /* Usage: lnk430 <obj files...> -o <out file> -m <map file> lnk.cmd */ /* cl430 <src files...> -z -o <out file> -m <map file> lnk.cmd */ /* */ /*----------------------------------------------------------------------------*/ /* These linker options are for command line linking only. For IDE linking, */ /* you should set your linker options in Project Properties */ /* -c LINK USING C CONVENTIONS */ /* -stack 0x0100 SOFTWARE STACK SIZE */ /* -heap 0x0100 HEAP AREA SIZE */ /* */ /*----------------------------------------------------------------------------*/ /****************************************************************************/ /* SPECIFY THE SYSTEM MEMORY MAP */ /****************************************************************************/ MEMORY { SFR : origin = 0x0000, length = 0x0010 PERIPHERALS_8BIT : origin = 0x0010, length = 0x00F0 PERIPHERALS_16BIT : origin = 0x0100, length = 0x0100 RAM : origin = 0x1C00, length = 0x4000 // INFOA : origin = 0x1980, length = 0x0080 // INFOB : origin = 0x1900, length = 0x0080 // INFOC : origin = 0x1880, length = 0x0080 // INFOD : origin = 0x1800, length = 0x0080 ZAREA : origin = 0x1000, length = 0x0010 BSL430_VERSION_VENDOR : origin = 0x1010, length = 0x0001 BSL430_VERSION_CI : origin = 0x1011, length = 0x0001 BSL430_VERSION_API : origin = 0x1012, length = 0x0001 BSL430_VERSION_PI : origin = 0x1013, length = 0x0001 ZAREA_CODE : origin = 0x1014, length = 0x002E // FLASH : origin = 0x1042, length = 0x07AE //???????????????? BSLSIG : origin = 0x17F0, length = 0x000C JTAGLOCK_KEY : origin = 0x17FC, length = 0x0004 // FLASH2 : origin = 0x10000,length = 0x15C00 FLASH : origin = 0x5C00, length = 0xA380 FLASH2 : origin = 0x10000,length = 0x15C00 INT00 : origin = 0xFF80, length = 0x0002 INT01 : origin = 0xFF82, length = 0x0002 INT02 : origin = 0xFF84, length = 0x0002 INT03 : origin = 0xFF86, length = 0x0002 INT04 : origin = 0xFF88, length = 0x0002 INT05 : origin = 0xFF8A, length = 0x0002 INT06 : origin = 0xFF8C, length = 0x0002 INT07 : origin = 0xFF8E, length = 0x0002 INT08 : origin = 0xFF90, length = 0x0002 INT09 : origin = 0xFF92, length = 0x0002 INT10 : origin = 0xFF94, length = 0x0002 INT11 : origin = 0xFF96, length = 0x0002 INT12 : origin = 0xFF98, length = 0x0002 INT13 : origin = 0xFF9A, length = 0x0002 INT14 : origin = 0xFF9C, length = 0x0002 INT15 : origin = 0xFF9E, length = 0x0002 INT16 : origin = 0xFFA0, length = 0x0002 INT17 : origin = 0xFFA2, length = 0x0002 INT18 : origin = 0xFFA4, length = 0x0002 INT19 : origin = 0xFFA6, length = 0x0002 INT20 : origin = 0xFFA8, length = 0x0002 INT21 : origin = 0xFFAA, length = 0x0002 INT22 : origin = 0xFFAC, length = 0x0002 INT23 : origin = 0xFFAE, length = 0x0002 INT24 : origin = 0xFFB0, length = 0x0002 INT25 : origin = 0xFFB2, length = 0x0002 INT26 : origin = 0xFFB4, length = 0x0002 INT27 : origin = 0xFFB6, length = 0x0002 INT28 : origin = 0xFFB8, length = 0x0002 INT29 : origin = 0xFFBA, length = 0x0002 INT30 : origin = 0xFFBC, length = 0x0002 INT31 : origin = 0xFFBE, length = 0x0002 INT32 : origin = 0xFFC0, length = 0x0002 INT33 : origin = 0xFFC2, length = 0x0002 INT34 : origin = 0xFFC4, length = 0x0002 INT35 : origin = 0xFFC6, length = 0x0002 INT36 : origin = 0xFFC8, length = 0x0002 INT37 : origin = 0xFFCA, length = 0x0002 INT38 : origin = 0xFFCC, length = 0x0002 INT39 : origin = 0xFFCE, length = 0x0002 INT40 : origin = 0xFFD0, length = 0x0002 INT41 : origin = 0xFFD2, length = 0x0002 INT42 : origin = 0xFFD4, length = 0x0002 INT43 : origin = 0xFFD6, length = 0x0002 INT44 : origin = 0xFFD8, length = 0x0002 INT45 : origin = 0xFFDA, length = 0x0002 INT46 : origin = 0xFFDC, length = 0x0002 INT47 : origin = 0xFFDE, length = 0x0002 INT48 : origin = 0xFFE0, length = 0x0002 INT49 : origin = 0xFFE2, length = 0x0002 INT50 : origin = 0xFFE4, length = 0x0002 INT51 : origin = 0xFFE6, length = 0x0002 INT52 : origin = 0xFFE8, length = 0x0002 INT53 : origin = 0xFFEA, length = 0x0002 INT54 : origin = 0xFFEC, length = 0x0002 INT55 : origin = 0xFFEE, length = 0x0002 INT56 : origin = 0xFFF0, length = 0x0002 INT57 : origin = 0xFFF2, length = 0x0002 INT58 : origin = 0xFFF4, length = 0x0002 INT59 : origin = 0xFFF6, length = 0x0002 INT60 : origin = 0xFFF8, length = 0x0002 INT61 : origin = 0xFFFA, length = 0x0002 INT62 : origin = 0xFFFC, length = 0x0002 RESET : origin = 0xFFFE, length = 0x0002 } /****************************************************************************/ /* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ /****************************************************************************/ SECTIONS { .bss : {} > RAM /* GLOBAL & STATIC VARS */ .data : {} > RAM /* GLOBAL & STATIC VARS */ .sysmem : {} > RAM /* DYNAMIC MEMORY ALLOCATION AREA */ .stack : {} > RAM (HIGH) /* SOFTWARE SYSTEM STACK */ .ZAREA : {} > ZAREA .BSL430_VERSION_VENDOR : {} > BSL430_VERSION_VENDOR .BSL430_VERSION_CI : {} > BSL430_VERSION_CI .BSL430_VERSION_API : {} > BSL430_VERSION_API .BSL430_VERSION_PI : {} > BSL430_VERSION_PI .ZAREA_CODE : {} > ZAREA_CODE .BSLSIG : {} > BSLSIG .JTAGLOCK_KEY : {} > JTAGLOCK_KEY .text : {}>> FLASH | FLASH2 /* CODE */ .text:_isr : {} > FLASH /* ISR CODE SPACE */ #ifdef __LARGE_DATA_MODEL__ .cinit : {} > FLASH | FLASH2 /* INITIALIZATION TABLES */ .const : {} > FLASH | FLASH2 /* CONSTANT DATA */ #else .cinit : {} > FLASH /* INITIALIZATION TABLES */ .const : {} > FLASH /* CONSTANT DATA */ #endif .cio : {} > RAM /* C I/O BUFFER */ .pinit : {} > FLASH /* C++ CONSTRUCTOR TABLES */ .init_array : {} > FLASH /* C++ CONSTRUCTOR TABLES */ .mspabi.exidx : {} > FLASH /* C++ CONSTRUCTOR TABLES */ .mspabi.extab : {} > FLASH /* C++ CONSTRUCTOR TABLES */ // .infoA : {} > INFOA /* MSP430 INFO FLASH MEMORY SEGMENTS */ // .infoB : {} > INFOB // .infoC : {} > INFOC // .infoD : {} > INFOD /* MSP430 INTERRUPT VECTORS */ .int00 : {} > INT00 .int01 : {} > INT01 .int02 : {} > INT02 .int03 : {} > INT03 .int04 : {} > INT04 .int05 : {} > INT05 .int06 : {} > INT06 .int07 : {} > INT07 .int08 : {} > INT08 .int09 : {} > INT09 .int10 : {} > INT10 .int11 : {} > INT11 .int12 : {} > INT12 .int13 : {} > INT13 .int14 : {} > INT14 .int15 : {} > INT15 .int16 : {} > INT16 .int17 : {} > INT17 .int18 : {} > INT18 .int19 : {} > INT19 .int20 : {} > INT20 .int21 : {} > INT21 .int22 : {} > INT22 .int23 : {} > INT23 .int24 : {} > INT24 .int25 : {} > INT25 .int26 : {} > INT26 .int27 : {} > INT27 .int28 : {} > INT28 .int29 : {} > INT29 .int30 : {} > INT30 .int31 : {} > INT31 .int32 : {} > INT32 .int33 : {} > INT33 .int34 : {} > INT34 .int35 : {} > INT35 .int36 : {} > INT36 .int37 : {} > INT37 .int38 : {} > INT38 .int39 : {} > INT39 .int40 : {} > INT40 RTC : { * ( .int41 ) } > INT41 type = VECT_INIT PORT2 : { * ( .int42 ) } > INT42 type = VECT_INIT .int43 : {} > INT43 .int44 : {} > INT44 USCI_B1 : { * ( .int45 ) } > INT45 type = VECT_INIT USCI_A1 : { * ( .int46 ) } > INT46 type = VECT_INIT PORT1 : { * ( .int47 ) } > INT47 type = VECT_INIT TIMER1_A1 : { * ( .int48 ) } > INT48 type = VECT_INIT TIMER1_A0 : { * ( .int49 ) } > INT49 type = VECT_INIT DMA : { * ( .int50 ) } > INT50 type = VECT_INIT .int51 : {} > INT51 .int52 : {} > INT52 TIMER0_A1 : { * ( .int53 ) } > INT53 type = VECT_INIT TIMER0_A0 : { * ( .int54 ) } > INT54 type = VECT_INIT ADC12 : { * ( .int55 ) } > INT55 type = VECT_INIT USCI_B0 : { * ( .int56 ) } > INT56 type = VECT_INIT USCI_A0 : { * ( .int57 ) } > INT57 type = VECT_INIT WDT : { * ( .int58 ) } > INT58 type = VECT_INIT TIMER0_B1 : { * ( .int59 ) } > INT59 type = VECT_INIT TIMER0_B0 : { * ( .int60 ) } > INT60 type = VECT_INIT UNMI : { * ( .int61 ) } > INT61 type = VECT_INIT SYSNMI : { * ( .int62 ) } > INT62 type = VECT_INIT .reset : {} > RESET /* MSP430 RESET VECTOR */ } /****************************************************************************/ /* INCLUDE PERIPHERALS MEMORY MAP */ /****************************************************************************/ -l msp430f5419a.cmd //i edited
But i always get the error while loading:
MSP430: File Loader: Data verification failed at address 0x00000060 Please verify target memory and memory map.
MSP430: GEL: File: D:\johannS\workspace_v5_3\BSL_V2\Debug\BSL_V2.out: a data verification error occurred, file load failed.
Do you know what my problem could be?
Thx,
Hans
Hi Hans,
Have you tried using the un-altered linker file from the 5xx_6xx_Example_BSL_Source?
0066.lnk_msp430f5418a.cmd Simply build the whole project for F5418A - it will probably give you a warning when you go to load it into the part about this not matching your F5419A but the F5418A memory should fit in F5419A just fine.
If you just import and build the project from 5xx_6xx_Example_BSL_Source into CCS without any alteration, are you able to load it? Are you able to load any other programs (non-BSL programs) without issue on your same board/tool setup?
Regards,
Katie
Hello Katie,
thank you very much for your help. Now i can start trough with altering the code for my project :)
I just needed to mark the checkboxs in CSS as described in:
http://processors.wiki.ti.com/index.php/MSP430_FAQ#How_to_enable_the_access_to_BSL_Flash_memory_in_MSP430F5xx.2F6xx_devices_.3F
and it worked :)
Regards,
Hans
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