hi,
I want to know whether there is clock synchronization process in USI module, when configured as I2C, or only arbitration process is present.
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hi,
I want to know whether there is clock synchronization process in USI module, when configured as I2C, or only arbitration process is present.
Sorry, but could you explain your question a little more in detail? At least I don't really know what you are asking for. Since I²C is a synchronous protocol, there is no need for synchronization. Or are you talking about multi master mode?
Dennis Eichmann said:Sorry, but could you explain your question a little more in detail? At least I don't really know what you are asking for. Since I²C is a synchronous protocol, there is no need for synchronization. Or are you talking about multi master mode?
hi,
its about multi master mode itself.
I think documentation for multi master mode is rare.
Maybe this thread answers at least some questions, although it is for the USCI:
http://e2e.ti.com/support/microcontrollers/msp430/f/166/t/181045.aspx
Dennis Eichmann said:Since I²C is a synchronous protocol, there is no need for synchronization
Yes. Including multi-master mode. Maybe question is not about clock synchronization but clock stretching?
GURU MOORTHY said:I want to know whether there is clock synchronization process in USI module, when configured as I2C, or only arbitration process is present.
Yes, all USCI modules have Arbitration and Clock Synchronization, see Users Guide for explanation.
hi,
more over I know its present in USCI, but I want to know whether clock synchronization is possible using USI module in I2C mode, during arbitration process in multi master case.
You will have to watch your data lines by polling their logic levels and react to them in software.
hi,
you guys sure? that USI does not have clock synchronization operation during the process of arbitration in multi master mode???
I don’t see a way to do this with the USI.
A possibility is make software I2C-bit, but this will require some code space which can comes too much for the (probably) little MCU, and it reduces the communication speed.
GURU MOORTHY said:you guys sure? that USI does not have clock synchronization operation during the process of arbitration in multi master mode???
More or less. USI is just shift register with additional start, stop and contention detection logic. By double-checking available USI information, I tend to believe that using USI to implement multi-master i2c is not a good idea unless you somehow implement clock phase alignment in software yourself. I would not even try.
Leo, Indeed, USI can only be used as master in a multi-master environment, if it is sure that the USI is the slowest master. Then the other masters are responsible for reacting on clock stretching.
Alternatively, some clock state testing code can be used, along with the software clock feature (still better than doing plain bit-banging)
Jens-Michael Gross said:USI can only be used as master in a multi-master environment, if it is sure that the USI is the slowest master. Then the other masters are responsible for reacting on clock stretching.
hi,
that means, are you trying to say that usi module CAN be used in multi-master environment????
It is possible under some circumstances. However, it is difficult. Since there is no hardware support for some things, everything must be done in software, which makes the USI not much superior than a plain bit-banging solution.
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