hi,
whether uscib0 interrupts have to enabled after clearing software reset or before that?????
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hi,
whether uscib0 interrupts have to enabled after clearing software reset or before that?????
hi,
so interrupts are to be enabled after clearing software reset. right?, you sure???
hi,
UCB0CTL1 |= UCSWRST; UCB0CTL0 |= UCMST + UCMODE_3 + UCSYNC; UCB0CTL1 |= UCSSEL_2 + UCSWRST; UCB0BR0 = 12; UCB0BR1 = 0; UCB0STAT &= ~(UCNACKIFG + UCSTPIFG + UCSTTIFG); IFG2 &= ~(UCB0TXIFG + UCB0RXIFG); UCB0CTL1 &= ~UCSWRST; UCB0I2CIE |= UCNACKIE + UCSTPIE + UCSTTIE; IE2 |= UCB0TXIE + UCB0RXIE;
whether this is correct? or
UCB0CTL1 |= UCSWRST; UCB0CTL0 |= UCMST + UCMODE_3 + UCSYNC; UCB0CTL1 |= UCSSEL_2 + UCSWRST; UCB0BR0 = 12; UCB0BR1 = 0; UCB0STAT &= ~(UCNACKIFG + UCSTPIFG + UCSTTIFG); IFG2 &= ~(UCB0TXIFG + UCB0RXIFG); UCB0I2CIE |= UCNACKIE + UCSTPIE + UCSTTIE; IE2 |= UCB0TXIE + UCB0RXIE; UCB0CTL1 &= ~UCSWRST;
this is correct?
that is first code is the right way or the second??
The first one is correct.
UCBxI2CSTAT bits 6-0, UCBxTXIE, UCBxRXIE, UCBxTXIFG and UCBxRXIFG are all kept cleared as long as UCSWRST is set. Trying to set them before clearing UCSWRST will have no effect.
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