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NOR gate and Ports

Other Parts Discussed in Thread: MSP430F5438A

Hi, 

How can Implement NOR gate? I am using MSP430F5438A.  I need to generate two PWM signals on P2.6 and P2.7. i am using Timer A to generate the PWM. The timer period is 10msec.  The clock is at 32KHz. I want to NOR the P2.6 and P2.7. I have also attached the timing waveform that I want. 

jess

  • (1) You said you want to generate two PWM signals on P2.6 and P2.7. But your drawing shows four, PWM1, PWM2, PWN3, and PWM4. Are there 2 or 4 PWM?

    (2) What about your NOR gate?  What does it got to do with all these?

    (3) You drawing also shows (20% + x +30% + y + 20% + z + 30%)  = (100%,+ x + y + z) which is > 100%

  • The waveform was there to give you an idea that I want Two PWM signals on two different pins with delaye between them.  Please ignore the PWM 3 and PWM4.

    Right now I do have two PWM waveforms but thery are in phase. The posted diagram is what I want but I am unable to get them. I am thinking about NOR the two PWM so,  can get 

    1 1 ---> 0

    0 0 ---> 1 

    I do not understand how to use just one timer and produce two PWM with time difference between them like I showed in the diagram (PWM1 and PWM2).

    jess

  • You cannot use one timer to generate those two PWM signals repeatedly. One solution is to use two timers. Another solution is to use the CPU to help the timer. 

    Solution 1: Set up timer 1 to generate PWM1 and start it. Set up timer 2 to generate PSW2 but start it 10 msec later.

    Solution 2: Set up the timer in continuous mode and use two CC to generate edges as well as interrupts. At each interrupt, use ISR to set up the next edge.

     

  • Hi, 

    Can you refer some code example to implement the solution1 and ?

    jess

  • I tried to implement Solution1. The code is as follows but no luck so far. The timer B does not start after 10msec

    WDTCTL = WDTPW + WDTHOLD; // Stop WDT
    P2DIR |= 0x0C; // P2.2 and P2.3 output; P2.6 and P2.7 are inputs
    P2OUT |= 0x0C; // P2.6 and P2.7 are pull ups
    P2SEL |= 0x0C; // P2.2 and P2.3 options select
    P2REN |= 0xFF; // P2.6 and P2.7 are pulled up internally

    P1DIR |= 0x03;

    P4DIR |= 0x06;
    P4OUT |= 0x06;
    P4SEL |= 0x06;
    P4REN |= 0xFF;

    TA1CCR0 = 655; // PWM Period
    TA1CCTL1 = 0x00F0; // + CCIE;
    TA1CCR1 = 327;
    //TA1CCTL2 = 0x0070;
    // TA1CCR2 = 262;
    TA1CTL = 0x0110;
    // P1OUT = TAIFG;

    TBCCR0 = 655; // PWM Period
    TBCCTL1 = OUTMOD_7;
    TBCTL = 0x0100;
    __bis_SR_register(LPM0_bits + GIE);
    __no_operation();

    }
    #pragma vector=TIMER1_A0_VECTOR
    __interrupt void TIMER1_A0_ISR(void)
    {
    P1OUT = TAIFG;
    TBCTL = 0x0110;
    }

    jess

  • Something like this can nearly be done with the hardware.

    Running the timer in up/down mode, you can either have a pulse at the end of the interval (using set/reset), at the beginning (using reset/set), or centered around the beginning or the middle (toggle mode).

    Assuming your two pulses are same length, you count up for 10ms and down for 10ms. The cycle begins at the middle of PWM1 pulse, toggling it off at 2ms, then, at 8ms, PWM2 is toggled on. The timer counts up to 10, then returns. When it reaches 8ms again, PWM2 is toggled of (ms length) and when it counts down to 2ms, PWM1 is toggles on. Giving two pulses of 4ms duration with 6ms distance. It only has to be symmetrical. You can’t do it with one pulse, then a pause, then the other pulse, then a much longer pause. That won’t work in hardware. You’ll then need software to toggle the pins manually in the desired pattern.

  • So, it can not be done using two timers. You are saying that I should use one timer.Let's say Timer A and program it to count in up/down mode. The total period of the count will be 20msec. 

    Output PWM1 when  timer A is counting up and output PWM2 when Timer A is counting down. 

    You said that I can manually toggle the pins in the desired pattern. How can I do that? This thing is getting more complicated than I thought. 

    jess

  • void main(void) {
    WDTCTL = WDTPW + WDTHOLD;

    P2SEL = BIT2;
    P2DIR = BIT2;

    P4SEL = BIT1;
    P4DIR = BIT1;

    TA1CCR0 = 655; // 20ms @ 32.768kHz
    TA1CCR1 = 164; // 5ms @ 32.768kHz
    TA1CCTL1 = OUTMOD_7;

    TBCCR0 = 655; // 20ms @ 32.768kHz
    TBCCR1 = 164; // 5ms @ 32.768kHz
    TBCCTL1 = OUTMOD_7;

    TA1CTL = TASSEL_1 | MC_1; // ACLK in Up-Mode
    delay_ms(10); // delay 10ms
    TBCTL = TBSSEL_1 | MC_1; // ACLK in Up-Mode

    __bis_SR_register(LPM0_bits + GIE);
    __no_operation();
    }

  • A generic pattern mechanism is complicated :)

    Using interrupts for individual timing is quite simple, but you need to take care of latencies

    Just program the CCRs for the next edge and duration.

    On each interrupt, increment the CCR by the amount of timer ticks until next edge, and change the OUTMOT. When the timer (running in cont mode) reaches the new value, the signal is changed according to OUTMODx and the ISR is called. Which will increment it by the number of ticks until next edge and change OUTMODx for the other direction. And so on.
    It allows individual output patterns for each CCR and still perform the signal switches with hardware timing precision. Just ensure the ISR gets executed before the next edge is due.

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