Hello,
I'm using MSP430f5249 controller. I'm sending AT commands through UART of controller to Telit GSM module.
I'm using external crystal of 8MHz as clock source. and intial settings of UCSC is as below.
PMAPPWD = 0x02D52; // Enable Write-access to modify port mapping registers
P4MAP7 = PM_MCLK;
PMAPPWD = 0; // Disable Write-Access to modify port mapping registers
P5SEL |= BIT2+BIT3; // Port select XT2
P5SEL |= BIT4+BIT5; // Port select XT1
UCSCTL6 &= ~XT2OFF; // Set XT2 On
// XT1 is by default on as it is used default reference for the FLL - internal load caps?
// Loop until XT1,XT2 & DCO stabilizes
do
{
UCSCTL7 &= ~(XT2OFFG + XT1LFOFFG + DCOFFG);
// Clear XT2,XT1,DCO fault flags
SFRIFG1 &= ~OFIFG; // Clear fault flags
}while (SFRIFG1&OFIFG); // Test oscillator fault flag
UCSCTL6 &= ~XT2DRIVE0; // Decrease XT2 Drive according to
// expected frequency
UCSCTL4 |= SELA_0 + SELS_5; // Select SMCLK, ACLK source and DCO source
UCSCTL4 |= SELM_5;
But while sending AT commands, SMCLK source is changing from 8Mhz to 1Mhz due to XT2 oscillator fault flag is getting set.
Please let me know what could be the reason for this issue. Why SMCLK frequency is getting changed on run time?
