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Simultaneously RX interrupts on three USCI

Denis Shashunkin
Prodigy 100 points
Other Parts Discussed in Thread: MSP430F5256

Hi all!

I have a question on concurrent use of UARTs and how correct processing simultaneously RX interrupts?

i.e.

for example, MCU is msp430f5256. It has four USCI_A. ( USCI_A0, USCI_A1,USCI_A2,USCI_A3 ).

MCU read/transmit data from  USCI_A1,USCI_A2,USCI_A3 and read/transmit it to USCI_A0.

Imagine, occur simultaneously receiving data on USCI_A1,USCI_A2,USCI_A3.

In this situation the data will not be lost? If not, USCI_As how works in this case? And why does not data lost?

And in this case, three interrupts occurs in a simultaneously time?

Explain more details please.

How correct manage GIE, and interrupt handlers for all UARTs?

Thanks!



  • 0
    Expert 1595 points

    Hi,

    Simultaneous interrupts get prioritised by the MSP430, so the main code is initially interrupted by the highest priority interrupt. Control will jump to the correct ISR and interrupts get disabled. 

    Once the ISR completes it returns and re-enables interrupts again. This will cause the next higher priority interrupt to call its own ISR and that will then be executed. Similarly this will return and the next one will get called.

    Provided that each of the interrupts is correctly processed by its own ISR there is no overall problem with multiple simultaneous interrupts except for latency (I.E. overall time from interrupt occurring to processing it).

    With your UART example there should be no problem providing that you can service ALL of the interrupts within a single character time on the highest baud rate.

    Roy

  • 0 in reply to Roy Deabill
    Prodigy 100 points

    Roy,

    thanks!

    But the RX data will not be lost on USCIA1 when one ISR is called for USCIA2?

    i.e. can internal rx( fifo buffer ) USCI buffer overflow and in which case it may occur? Baudrate is 115200 on all four ASCI.

  • 0 in reply to Denis Shashunkin
    Expert 1595 points

    Hi,

    There is not a fifo buffer in the 430F5 family. The UART has a shift register that each bit is received into and a holding register into which the byte is transferred one the required number of bits have been received. (Usually 1 Start, 8 Data 1 Stop) You Have to empty the "Receive Buffer UCAxRXBUF" within 10 bit times at 115200, or else the data in UCAxRXBUF will be overwritten. with three ports you will have do do it for all three in thios time if it is possible for all three to bi in RX mode at the same time. 

    You will need to work out what time this allows you and then carefully write a very efficient ISR to save the data. You need to work out timings of your ISR to be sure it will work. You can do this by calculating clock cycles and the MCLK rate or you can try experimenting and measuring with a scope..

    My basic calcs would be

    115200 bits per sec * 3 gives 345600 bits per sec

    with 10 bits per character gives 34560 characters per sec ---> 34560 characters per second

    Maximum Clock on MSP430F5 series is 25MHz.

    25000000 / 34560 = 723 clock cycles per interrupt.

    I suspect that 723 clocks would allow you to service the interrupt, but you need to carefully check my reasoning to assure yourself that it will work. (Hopefully someone else on the forum will also comment)

    Roy

  • 0 in reply to Roy Deabill
    Prodigy 100 points

    Roy,

    big thanks!

    Basically, I understand how it works.

    But there is still a question. What size the shift register? It has more than 10 bit or equal 10 bit?

  • 0 in reply to Denis Shashunkin
    Guru 25210 points

    Denis Shashunkin said:
    What size the shift register?

    Whatever size it needs to be for the character length and parity options you have chosen.

    The shift register receives the bits to form the character. The character is transferred to the RXBUF register for you to obtain, and this register is 8 bits.

    So, it doesn't matter what size the shift register is, your program gets one byte (8 bits) at a time per interrupt.

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