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SPI issues in MSP430 and AM3352

Other Parts Discussed in Thread: AM3352, MSP430F5437A

Hi friends,

AM3352 and MSP430 communicated using SPI communication. 

AM3352 - MASTER

MSP430 - SLAVE

I have sent a two character(AB) from AM3352 to MSP430 and MSP430 sends a two character(CD) if the received character is same. 

AM3352 ---AB---> MSP430F5437A

AB == AB ?

MSP430F5437A --- CD---> AM3352

At AM3352, I have stored the received data in array. Here received data array only has 'C' character even The 'D' character present in AM3352 RX buffer and RXFULL in set. 

What is the issue? 

Please guide me. Thanks in advance.

Regards,

Keerthi G.

  • My crystal ball is still away for maintenance (why do these fairies need such a long time to fix it?). So I can’t see your likely buggy code.
    However, you say the D character is in the RX buffer and RXFULL is set on the AM3352. So apparently it is your AM3352 code that is buggy and doesn’t ‘want’ the last byte even though it has been received. Well, AM3352 is not the topic of this forum.

  • Hi Jens-Michael,

    I know it is not a Am3352 forum. But for SPI communication and MSp430 present in this.So that I asked questions here.

    I have tested something woth this.

    I have sent only "ABCDEF" character from MSP430 to AM3352.

     

    AM3352 received character:

    8mhz to 1 mhz range: "AAABBB"

    Below 1Mhz: "AABB"

    At 800khz: "AB"

    At 100khz and below: "A"

     

    I thought the reason is AM3352 doesn't give time to respond for MSP430. 

     

    Please give your suggestion and solution.

     

    Regards.

    Keerthi G.

  • Okay, so you want to send ‘ABCDEF’ to the AM3352, but it receives “AAABBB”.
    This looks like the MSP can’t update the TXBUF register fast enough, so the USCI already sends the last written content 3 times, before your code can update it to the next.

    How fast is your CPU clock?
    If the CPU runs on 1MHz, and the SPI runs on 8MHz, you only have one CPU cycle for each byte. Which of course is by far not enough.
    Even with hand-crafted assembly code, you’ll need at least 10 CPU cycles per each 8 SPI clock cycles, to update the TXBUF fast enough.
    When you read the data from a string, use an index variable, or use interrupts, this is more than 30-40 CPU cycles (meaning the CPU speed must be at least 5 times higher than the SPI speed).

    It’s probably not the USCI configuration, but rather the system clock configuration that needs some adjustment. And maybe your sending algorithm too.

    However, it's strange that it doesn't get better with slower clock. This is usually a sign of quite the opposite: the code being too fast (not synchroniing with the transfer) at some point.

    A look at your code would be helpful.

  • Hi Jens-Michael Gross,

    Thanks. 

    MSP430 GPIO connected to AM3352.

    Using that, I have changed algorithm to sending a data.

    Now the process works correctly.

     

    Regards,

    Keerthi G.

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