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MSP430 LFXT1 accuracy

Hi!

I have a problem with the accuracy of the XT1 oscillator. I  am using launchpad f5529.

I set up the UCS so that ACLK is sourced by XT1, then sourced Timer A with ACLK.

Made a simple program which toggles the LED1 with 8 Hz frequency.

I measured the frequency of the signal directly at the crystal: 32.766 Khz

And the frequency I get at the led: 8.0898 Hz.

This is a significant, more than 1% difference!!!

My initialization of the UCS: (I used driverlib for FLL, and I did not touch the UCS settings apart from these)

PMM_setVCore(PMMCOREV_3);
P5SEL |= BIT2 + BIT3 + BIT4 + BIT5; 
UCS_initFLLSettle(24903,760);
UCSCTL5 |= DIVS_1; //smclk divide by 2

As I reckon ACLK gets sourced from XT1 by default..

For timer A:

 TA0CTL |= TASSEL__ACLK + MC__CONTINOUS;

And my program:

while(1)
{
tmp=TA0R;
LED1_TG;
while(TA0R!=tmp+2048);

}

What am I missing here? It seems as if ACLK does not come from XT1 after all...

I checked the XT1LFOFFG which is set after initialization, but if I reset it, it remains zero so the oscillator seems to run just fine. 

Thank you!

  • If you want to measure precise any MSP430F5xx generated clock do it by mapping directly clock output to port 4, and not by code execution.
  • Even if you set up to use external watch-crystal "correctly" in firmware, that hardware oscillator might not oscillate "correctly". When that happens, the "failsafe" feature will automatically use REFO instead of XT1 oscillator. REFO has a frequency tolerance of +/- 1.5% at 25 degrees C. (And +/- 3.5% full temperature range.)

    Using an oscilloscope probe to measure the waveform of a watch-crystal is self defeating. Doing so may make a working crystal stop working, or a not working crystal start working.
  • Yeah thanks, that's what I figured out myself, that the UCS switches automatically to REFO if it detects a fault with XT1. I have to resolve this by software using the OFIFG NMI. The XT1LFOFFG being set after boot means that the UCS has switched back to REFO already, and only clearing the flag does not helpy you also have to rewrite the SELA and SELREF bits in UCSCTLx...
  • SELA or SELREF don't need to be rewritten after a fault. However, on boot they are of course set to default values, to allow the MSP operate on default frequency (rather than on none at all). But if a fallback occurred due to a fault, these settings are without effect as long as the fault persists (or OFIFG is still set).
    Since at a reset/power-on, XT1 is not active, LFXT1OFG is always set, causing a fallback.

    However, you use library code, and I don't know what the library code may do or not to registers or flags. Sometimes more than you'd expect, sometimes less.

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