Use CCS V6.0.1. By using FR5949, without using any setout breakpoints conditions. If I let “UCS” run 8Mhz ( CSCTL1 = DCOFSEL_6;) , the printf() won’t stop itself, but under “UCS” running under 16Mhz (FRCTL0 = FWPW | NACCESS_1; CSCTL1 = DCORSEL | DCOFSEL_4;) conditions, the printf()
will stop itself at line 90 (at trgmsg.c (i = 0; i < length; i++) PACKCHAR(*data++, p, i+8))
can you tell me why it causes that problem?
The test are as followed:
/*
* main.c
*/
#include <msp430.h> #include <stdio.h>
int i;
int main(void) {
WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer
PJSEL0 |= BIT4;
PJSEL0 |= BIT5;
FRCTL0 = FWPW | NACCESS_1; //---16MHz //8MHz not use
CSCTL0_H = CSKEY >> 8; // Unlock CS registers
// CSCTL1 = DCOFSEL_6; // Set DCO to 8MHz //---8MHz //16MHz not use
CSCTL1 = DCORSEL | DCOFSEL_4; // Set DCO to 16MHz //---16MHz //8MHz not use
CSCTL2 = SELA__LFXTCLK | SELS__DCOCLK | SELM__DCOCLK;
CSCTL3 = DIVA__1 | DIVS__1 | DIVM__1; // Set all dividers
CSCTL4 &= ~(LFXTOFF + VLOOFF); // Enable LFXT1, VLO ON
do {
CSCTL5 &= ~LFXTOFFG; // Clear XT1 fault flag
SFRIFG1 &= ~OFIFG;
} while (SFRIFG1&OFIFG); // Test oscillator fault flag
CSCTL0_H = 0; // Lock CS registers
for (i=0; i<100; i++){
__delay_cycles(16000000);
printf("i=%x\n", i);
}
return 0;
}