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MSP430F5510 BSL stuck because XT2 not starting.

Other Parts Discussed in Thread: MSP430F5510, MSP430F5529

I'm having problems with the BSL on my MSP430F5510 based design. The BSL does not work and after debugging the issue I traced it to the XT2 oscillator not starting. The BSL code waits in an endless loop for the XT2 crystal to start oscillating.

I'm using a 4 MHz crystal and consulting the MSP430F5510 datasheet I can see that XT2DRIVE should be set to 0 (the lowest current) when using crystals between frequencies of 4 to 8 MHz. The stock BSL code provided by TI always uses the max current setting of 3.

I modified the BSL code and set the XT2DRIVE to 0, and sure enough the XT2 starts.

So here's the questions:.

1.  The TI BSL code performs autodetection of crystal frequencies, yet with an unknown crystal it always uses max XT2DRIVE, violating the spec. Is that a bug in the BSL code?

2. Contradictory to the spec I assumed that max XT2DRIVE will work with any frequency, but for lower power consumption the osc current can be reduced with lower frequency crystals. If this is correct, what reasons could there be that a 4 MHz crystal doesn't oscillate with max current, but it does with min current?

Thank you for any insight.

Daniel

  • You should decrease XT2DRIVE after XT2 is started and running OK. I am using MSP430F5510 with 24 MHz XT2, but even with 4 MHz I will go with max XT2DRIVE because impact on consumption during BSL flash update (total time 1 second) is not important, and it is used vary rare.

    On my MSP430F5510 custom board I have socket for XT2, and default TI USB BSL is working with any 4, 8, 12 or 24 MHz XT2.

    From slau208 MSP430x5xx and MSP430x6xx Family User's Guide

    The XT2 oscillator current can be adjusted to its drive needs. Initially, it starts with the highest supply current for reliable and quick startup. If needed, user software can reduce the drive strength.

  • Yes. But the problem is that the XT2 DOES NOT START with XT2DRIVE set to max. What could be the issue?

  • It works on most other boards. Show your board layout.
  • This is the layout:

    U3 is the MSP430F5510.

    X1 is the ceramic resonator CSTCR4M00G15L99 with integrated caps. The same is used in the MSP430F5529 Launchpad Demo Board from TI.

    http://www.murata.com/~/media/webrenewal/support/library/catalog/products/timingdevice/ceralock/p16e.ashx

    Surely the layout is not perfect, as the resonator could be placed a bit closer at the expense of the caps, but is this truly that critical?

    Thank you for any advice.

    Daniel

  • The datasheet says:

    … the following guidelines should be observed.
    (a) Keep the traces between the device and the crystal as short as possible.
    (b) Design a good ground plane around the oscillator pins.
    (c) Prevent crosstalk from other clock or data lines into oscillator pins XT2IN and XT2OUT.
    (d) Avoid running PCB traces underneath or adjacent to the XT2IN and XT2OUT pins.

    Those traces are not short, and the trace to C7 goes unnecessarily near the X1 traces. Furthermore, the two X1 traces form quite a large loop area.

    There appears to be enough free space to move X1 near the MSP; this should have been done in the first place.

    For comparison, this is the LaunchPad:MSP-EXP430F5529LP board layout - XT2

    I do not have hard numbers for the resonator placement, but yes, it is critical, and in this case, the evidence appers to show that the layout is, er, capable of improvement.

  • Ok, thank you. I would have never thought that this is so critical. Especially because I have done way worse layouts with different msp models, although different crystals, and I never had any issues.

    You don't happen to have any insight in why it doesn't run with high current setting (XT2DRIVE=3), but it runs with low current (XT2DRIVE = 0)? Just for my understanding of how the msp crystal driver works. I was always under the assumption, more current is better, but an unnecessary waste of power. So I'm surprised to see it fail at high current, but work at low.

  • Higher drive strength, like long traces and a large loop area, increases EMI. However, this would imply that other parts of the board are affected, not that this affects the clock itself. In other words, I don't have a clue.
  • Daniel Schoch75 said:

    Surely the layout is not perfect, as the resonator could be placed a bit closer at the expense of the caps, but is this truly that critical?

    C3 on VBUS can be 4.7u 6.3V, and it is available as 0603 size. Than all 3 caps (I guess same 0603 size) can be placed vertically, because  other side for all caps is going to GND. I am afraid that layout part related to USB can be much better, with all parts placed near MSP.

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