This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

MSP430F5437A SPI slave issue

Hi,

I am having an issue in using SPI B1 (slave mode) module in the mentioned controller. The issue is that the controller is not able to trap the vector for the interrupt for the given mode. Below is the configuration that I am using in. 

void Slave_InitSPI(void)
{
//Disable the USCI Module
UCB1CTL1 = UCSWRST;

//Reset SPI register
UCB1CTL0 &= ~(UCCKPH + UCCKPL + UC7BIT + UCMSB + UCMST + UCMODE_3 + UCSYNC);


//Configure as SPI slave mode
UCB1CTL0 |= (UCCKPL + UCMSB + UCMODE_0 + UCSYNC);

//P3.7 as UCB1SIMO, P3.6 as CS, P5.5 as UCB1CLK, P5.4 as UCB1SOMI
P3SEL |= BIT7 + BIT6;
P3DIR &= ~(BIT7 + BIT6);

P5SEL |= BIT5;
P5DIR &= ~BIT5;

P5DIR |= BIT4;
P5SEL = (BIT4);

//Enable USCI module
UCB1CTL1 &= ~UCSWRST;

//Enable Receive interrupt
UCB1IFG &= ~(UCRXIE + UCTXIE);
UCB1IE |= UCRXIE;
}

void SPISlaveReceiveData ()
{
extern uint8_t ReceiveData;
//Data received from receive buffer
ReceiveData = UCB1RXBUF;
}

//******************************************************************************
//
//This is the USCI_B1 interrupt vector service routine.
//
//******************************************************************************
#pragma vector= USCI_B1_VECTOR
__interrupt void USCI_B1_ISR(void)
{
extern uint8_t ReceiveData;
switch (__even_in_range(UCB1IV, 4)) {
//Vector 2 - RXIFG
case 2:


//USCI_B1 TX buffer ready?
//while (!(UCB1IFG & UCTXIE)) ;

//Transmit data to master
//USCI_B_SPI_transmitData(USCI_B0_BASE, transmitData);

//Receive data from master
SPISlaveReceiveData();

//Print on LCD
LCD_PassStringForDoublePageFont(&ReceiveData,2,'C','N');

//Increment data to be transmitted
//transmitData++;

break;

default: break;

}
}

Can someone please help me with this issue?

Thanks

Akshay

  • Akshay,


    I'm moving this post to the MSP Low-Power Microcontrollers forum. I think this questions belongs here.


    Joseph Wu
  • In your setup, you're explicitly clearing all bits in UCB1CTL0, even though UCSYNC is read only. It doesn't really hurt. But you could as well just assign 0 to UCB1CTL0, or skip this line completely, as you are setting all required bits (and deleting the others) with the next line.
    Are you sure that UCMSB is correct? AFAIK, I never had to set it for all the SPI devices I accessed.

    Are you sure you have enabled interrupts? You didn't post your main code. So I can't be sure you are even calling Slave_initSPI() a tall.

    Inside your ISR, you call small subfuncitons like SPISlaveReceiveData (which is a waste of time and stack space if you could as well integrate this into the ISR) but also complex functions for LCD (which might require interrupts themselves but can't work because interrupts are disabled inside an ISR and MUST NOT BE ENABLED unless you're exactly knowing what you#re doing - you have been warned)

    No need to set PxDIR for any USCI signals - the USCI controls the direction and PxDIR is a don't care.

    Are you sure about using STE on P3.6? This one is controlling the input and output drivers (like a hardware switch between USCI and high-impedance GPIO inputs). If you do not handle this line correctly (wrong signal level) by the master, the USCI will be deaf during the transmission and listening when the master is silent. However, since you use UCMODE_0, STE is not in effect anyway.

    If you made the external wiring correct and the master is sending, then you should get an RX interrupt at least once - if you have enabled interrupts in your main function. And if you do not fall out of main (into the void) right after setting-up the SPI.

**Attention** This is a public forum