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Keep timer output IO value when changing settings?

John Mielke
Prodigy 230 points

Hi,

If a timer is running and driving an output, what would the associated output IO pin be when timer stops?

1. For example if at 50% of the timer period one stops the timer by setting MCx to 0x00 (stop), apply new settings and reset MCx to 0x01(start), the instructions might take some cycles to complete. In this interval would the output IO pin be high or low?

If we need to keep timer’s output IO pins DEFINITEly high or low during the setting switch, should we: enable PxREN pulling → change PxSEL to IO pins → MCx stop, change setting, MCx start → change PxSEL to timer output?

 

2. There is a TACLR bits in the TACTL register which resets TAR, clock divider and timer count direction. Is this relevant to the above question?

 

John

  • 0
    Guru 74080 points

    Indeed a good question and to be honest: I don't know. I would guess it keeps it last state. But maybe you can write your desired output value to the OUT-bit in the CCTLx register and then switch over to OUTMOD_0. In this case the output is controlled by the OUT-bit. Then make your changes and switch back to normal operation.


    TACLR is often misunderstood. It does not reset the divider setting itself for example. If you have set ID_2 it stays ID_2 but the internal counting logic with it's dividing flipflops are reset to zero again. Same for the direction. If you selected up-down-mode then it stays up-down-mode. It just will start with the up-part again when it originally was counting down at the moment. And TAR is just set to zero.

    Dennis

  • 0
    Guru 243110 points

    With the exception of output mode 0, the output bit's value is not determined by the state of some register bits, but by events that happen due to counting.

    So when the timer is stopped, changes cannot happen.

    As for switching the output mode, the User's Guide says:

    When switching between output modes, one of the OUTMOD bits should remain set during the transition, unless switching to mode 0. Otherwise, output glitching can occur, because a NOR gate decodes output mode 0. A safe method for switching between output modes is to use output mode 7 as a transition state.

  • 0 in reply to Clemens Ladisch
    Guru 227245 points
    It should be added that setting the timer to 0 (by writing to TAR or using TACLR) or to a value that matches the content of a compare register, this is not a counting event and does not affect the output state.

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