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signal generation

Other Parts Discussed in Thread: MSP430F2619

I am using msp430f2619

it contains two internal DACs, consider i am generating a signal using DAC0. 

is it possible that DAC0 reference is driven by DAC1?

i want to control the amplitude of the signal and the frequency is already controlled by DMA in DAC0.

  • Configure DAC0 to use VeREF+, and connect it to the output of DAC1.

  • yes finally everything is set i have done it with external reference. i have generated sinewave but i want to know that how much resolution of frequency should i get?

    is it possible that when we are using DMA to send the data of particular signal, in between two data we will provide some delay so that it will affect the frequency,,,

  • >is it possible that when we are using DMA to send the data of particular signal, in between two data we will provide some delay so that it will affect the frequency,,,

    Sure you can and shall clock your DMA transfers using timer. I would say that variable DAC clock is "brute force" approach of variable frequency wave generation. Better you run your DAC at max sample speed all the time, but to change output wave (frequency) - change sample (ring) buffer contents and length. For example: if you have 100 DAC value ring buffer, you can fill it with two sine period data to get 20KHz sine output at 1Msps, if you fill 100 samples with single sine period data, you will get 10KHz output at 1Msps. To get 12.5KHz output, you just use 80 samples filled with single sine period and so on.

  • first thank you for your reply
    consider this sample code

    RESET mov.w #SFE(CSTACK),SP ; Initialize stackpointer
    StopWDT mov.w #WDTPW+WDTHOLD,&WDTCTL ; Stop watchdog timer
    SetupADC12 mov.w #REFON+REF2_5V,&ADC12CTL0 ; Internal reference
    SetupDMA0 movx.a #Sin_tab,&DMA0SA ; Source block address
    movx.a #DAC12_0DAT,&DMA0DA ; Destination single address
    mov.w #20h,&DMA0SZ ; Block size
    mov.w #DMA0TSEL_5,&DMACTL0 ; DAC12IFG trigger
    mov.w #DMADT_4+DMASRCINCR_3+DMAEN,&DMA0CTL; Rpt, inc src, word-word
    SetupDAC120 mov.w #DAC12SREF_2+DAC12LSEL_2+DAC12IR+DAC12AMP_5+DAC12IFG+DAC12ENC,&DAC12_0CTL
    SetupC1 mov.w #OUTMOD_3,&TACCTL1 ; TACCR1 set/reset
    mov.w #01,&TACCR1 ; TACCR1 PWM Duty Cycle
    SetupC0 mov.w #713,&TACCR0 ; Clock period of TACCR0;
    SetupTA mov.w #TASSEL_2+MC_1,&TACTL ; SMCLK, contmode
    SetupDAC121 mov.w #DAC12AMP_5+DAC12IR+DAC12ENC,&DAC12_1CTL ; Int ref gain 1
    mov.w #0fffh,&DAC12_1DAT ;
    Mainloop bis.b #CPUOFF,SR ; Enter LPM0
    nop ; Needed only for debugger
    ;
    ;-------------------------------------------------------------------------------
    ; 12-bit Lookup table with 32 steps
    ;-------------------------------------------------------------------------------
    Sin_tab DW 2048, 2447, 2831, 3185, 3495, 3750, 3939, 4056
    DW 4095, 4056, 3939, 3750, 3495, 3185, 2831, 2447
    DW 2048, 1648, 1264, 910, 600, 345, 156, 39
    DW 0, 39, 156, 345, 600, 910, 1264, 1648
    ;-------------------------------------------------------------------------------
    ; 12 BIT LOOK UP TABLE 72 STEPS
    ;-------------------------------------------------------------------------------
    ;Sin_tab DW 2048, 2226, 2403, 2578, 2748, 2913, 3072, 3222
    ; DW 3364, 3495, 3616, 3725, 3821, 3903, 3972, 4025
    ; DW 4064, 4087, 4095, 4087, 4064, 4025, 3972, 3903
    ; DW 3821, 3725, 3616, 3495, 3364, 3222, 3072, 2913
    ; DW 2748, 2578, 2403, 2226, 2048, 1870, 1693, 1518
    ; DW 1348, 1183, 1024, 874, 732, 601, 480, 371
    ; DW 275, 193, 124, 71, 32, 9, 1, 9
    ; DW 32, 71, 124, 193, 275, 371, 480, 601
    ; DW 732, 874, 1024, 1183, 1348, 1518, 1693, 1870

    in above code currently i am using 32 steps.But when i am going to use 72 steps at that time i can not set exact frequency value. In your answer you have explained the things does they possible for above code?
  • >In your answer you have explained the things does they possible for above code?
    Can't tell because don't do assembler (and don't want to). Thou as far as I recognise register names, idea to use DMA and timer seems to be going right way. I am not sure that you correctly set-up timer for DMA clock.

    Dod you try to debug it? What are results?

  • yes i have done debugging and getting wave, but not got the resolution of frequency ....
  • Finally i got the answer by calibrating internal DCO i got the resolution of the frequency now the thing is that what is the stability of that, i mean if i am going to design a digital source based on above is it will be stable?

    And which precautions should be taken while doing programming and also hardware side....
  • Jignesh Doshi1 said:
    if i am going to design a digital source based on above is it will be stable?

    Nothing in this world is stable. Even atomic clocks drift. You shall define long term and short term stability you are looking for. DCO have significant temperature drift and it also have jitter. I would not call resulting waveforms as "stable" at all. On the other hand who knows - maybe result is good for you. If you care about stability and jitter-less output, then consider to use crystal oscillator clock.

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