setting up external clock MSP430FR5739

Don't use numerical values when the register fields have proper symbols.

You have to clear the fault flags; see section 3.2.7 of the User's Guide, and MSP430FR57xx_CS_03.c in the example C code package (SLAC491).

Sorry, I did clear the flags by writing CSCTL5 to 0x0000.
PJSEL1 = 0x30;
CSCTL2 = 0x0000;
CSCTL3 = 0x0000;
CSCTL5 = 0x0000;
CSCTL6 = 0x0000;
CSCTL4 = 0xC1F0;

"Don't use numerical values when the register fields have proper symbols" - What does this mean?

Do I have to write CSCTL0 first to enable access?

There are more fault flags. And it is not enough to clear them once; you have to wait until the fault condition actually goes away. (See the example code.)

Nobody is going to reverse engineer what these numbers might mean; use symbols like XT2DRIVE_3.

I see what you mean about the reverse engineering. I mostly copied the code you suggested. I've simple code that what ever is on P2Bus shows up on P1 and P3 buses. it works when i do not try and change the MCLK from default. Now nothing happens and all busses are tri-state. Is there a restart or wait period needed when changing clock sources? Or is that what checking the fault flag does?

PJSEL0 |= BIT4 + BIT5;
CSCTL0_H = 0xA5;
CSCTL1 |= DCOFSEL0 + DCOFSEL1; // Set max. DCO setting
CSCTL2 = SELA_0 + SELS_3 + SELM_0; // set ACLK = XT1; MCLK = XT1
CSCTL3 = DIVA_0 + DIVS_0 + DIVM_0; // set all dividers by 1
CSCTL4 |= XT1DRIVE_3;
CSCTL4 &= ~XT1OFF;

do
{
CSCTL5 &= ~XT1OFFG;
// Clear XT1 fault flag
SFRIFG1 &= ~OFIFG;
}while (SFRIFG1&OFIFG); // Test oscillator fault flag

// Now that osc is running enable fault interrupt
SFRIE1 |= OFIE;

P3DIR = 0xFF; // bus is an output
P2DIR = 0x00; // bus is an input
P1DIR = 0xFF; // bus is an output;

while(1)
{
P3OUT = P2IN;
P1OUT = P2IN;
__delay_cycles(1);
}

Now XIN is not configured for bypass mode.