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MSP430G2553 UART working problem

Other Parts Discussed in Thread: MSP430G2553

Hi everyone, I'm using MSP430g2553 and my initialization code for UART when system clock frequency is 16Mhz is 

      P1SEL  |= (BIT1|BIT2);
      P1SEL2 |= (BIT1|BIT2);
      UCA0CTL1 |= UCSSEL_2;                     // SMCLK
      UCA0BR0 = 1666;                         
      UCA0BR1 = 6;                             
      UCA0MCTL = (UCBRS0);                        // Modulation UCBRSx = 1
      UCA0CTL1 &= ~UCSWRST;                     // Initialize USCI state machine

it's working properly.But, when I change my system clock frequency to 12Mhz and I changed UCA0BR0 to 1250,                        
      UCA0BR1 to 0, still UART is not working. please someone help me how can I make it to work at 12Mhz clock frequency. 

  • Hi Dhananjay!

    You should tell us the baudrate you want to use. I think you got something wrong there.

    From the 1666 assigned to UCA0BR0 I guess you want to use 9600 baud at 16 MHz, right? Remember that both, UCA0BR0 and UCA0BR1, are 8 bit wide registers, so you cannot write 1666 into UCA0BR0. The possible range is from 0 to 255.

    1666 is the complete divider that you have to set using UCA0BR0 and UCA0BR1. The divider is set by:

    (256 x UCA0BR1) + UCA0BR0

    To get 1666, you have to write

    UCA0BR1 = 1666 / 256 = 6

    UCA0BR0 = 1666 - (UCA0BR1 * 256) = 1666 - 1536 = 130

    Additionally this setting requires second stage modulation - it is 6 in this case, so also set:

    UCA0MCTL = UCBRS_6

    I'm wondering how you got it running at all. Anyway, let's say we want to have 9600 baud at 12 MHz SMCLK, then your divider is 1250 - let's do the math again:

    UCA0BR1 = 1250 / 256 = 4

    UCA0BR0 = 1250 - (UCA0BR1 * 256) = 1250 - 1024 = 226

    There is no second stage modulation for 9600 baud at 12 MHz clock.

    So your initialization should be:

    WDTCTL    = WDTPW + WDTHOLD; // Stop watchdog timer
    
    BCSCTL1   = CALBC1_12MHZ;    // Set range
    DCOCTL    = CALDCO_12MHZ;    // Set DCO step and modulation
    
    P1SEL    |= (BIT1 | BIT2);   // P1.1 and P1.2 to UART function
    P1SEL2   |= (BIT1 | BIT2);   // P1.1 and P1.2 to UART function
    
    UCA0CTL1  = UCSWRST;         // Set USCI in reset state
    UCA0CTL1 |= UCSSEL_2;        // Select SMCLK for UART
    UCA0BR0   = 226;             // Divider for 9600 baud at 12MHz
    UCA0BR1   = 4;               // (4 * 256) + 226 = 1250 => 12 MHz / 1250 = 9600
    UCA0CTL1 &= ~UCSWRST;        // Release USCI from reset state

    Dennis

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