MSP430FR68xx I2C transfer on launchpad is blocked with UCBBUSY and UCSCLLOW

Section 23 26.3.2 of the User's Guide says:

UCBBUSY is set after a START and cleared after a STOP.

For when UCSCLLOW is set, see section 23 26.3.7.1.

Neither bit necessarily indicates an error.
What are the values of the other status flags when this happens?

Which user's guide are you using? I am using MSP430FR68xx (SLAU367i from October 2012/April 2016).

In the blocked state in the status register always the bits UCSCLLOW and UCBBUSY are set. The hardware byte counter has different values (1..5).

In the interrupt flag register only bit 14 (UCBIT9IFG) is set, which seems to be always the case after each transfer.

If the blocked state is reached, 4 bytes are received. A complete transfer consists of 5 Rx bytes and afterwards 3 Tx bytes.
No I2C interrupt is generated anymore.

The same blocked state happens always if I stop program execution with debugger in ISR after first byte is received.
Afterwards also UCSCLLOW and UCBBUSY is set an no I2C interrupt is generated anymore (I assume because clock is low and not toggling anymore).

How should this state be left? At the moment the only way to get out of this state is to reset and reinitialize the eUSCI_B(I2C) block.

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I changed the code on the I2C master side in order to have 3 separated parts.
1. Send 5 bytes (e.g. 0x80, 0x10, 0x00, 0x00, 0x00) and wait 100 ms
    HID_SMBUS_STATUS status = HidSmbus_WriteRequest(*m_pHidSmbus, m_slaveAddress, writeData, m_writeDataSize);
    Sleep( 100 );

2. Send Read Request for 3 bytes and wait 100 ms
    status = HidSmbus_ReadRequest(*m_pHidSmbus, m_slaveAddress, m_bytesToRead);
    Sleep( 100 );
    status = HidSmbus_ForceReadResponse(*m_pHidSmbus, m_bytesToRead);

3. Read the 3 requested bytes and wait for 100 ms
    status = HidSmbus_GetReadResponse(*m_pHidSmbus, &status0, buffer, HID_SMBUS_MAX_READ_RESPONSE_SIZE, &numBytesRead);
    Sleep( 100 );

With 10 kHz I2C clock it seems to work.
If I use 100 kHz I still see the blocked state where UCSCLLOW and UCBBUSY is set and no interrupt is triggered anymore.

#pragma vector=USCI_B1_VECTOR
__interrupt void ISR_EUSCI_B1( void )
{
    static Uint16 readWord = 0;

    switch( __even_in_range( UCB1IV, 0x1E ) )
    {
        case USCI_I2C_UCTXIFG0:
            ////////////////////
            // tx - interrupt //
            ////////////////////
            {
                Uint8 byteToSend;
                i2cTxIrqCount++;
                allTxIrqCount++;
                switch( i2cTxIrqCount ) 
                {
                    case 1:
                        byteToSend = (readWord & 0xFF00) >> 8;
                        break;

                    case 2:
                        byteToSend = (readWord & 0x00FF);
                        break;

                    case 3:
                        byteToSend    = 0xFF;
                        i2cTxIrqCount = 0;
                        break;

                    default:
                        break;
                }
                if( i2cRxIrqCount == 0 )
                {
                    switchLED( LED_RED, false );
                }

                EUSCI_B_I2C_slavePutData(   EUSCI_B1_BASE, byteToSend );
                EUSCI_B_I2C_clearInterrupt( EUSCI_B1_BASE, EUSCI_B_I2C_TRANSMIT_INTERRUPT0 );
            }
            break;

        case USCI_I2C_UCRXIFG0: 
            ////////////////////
            // rx - interrupt //
            ////////////////////
            // 0 : command (0x80=read, 0x00=write)
            // 1 : word address
            // 2 : value MSB
            // 3 : value LSB
            // 4 : not used
            rxBytes[i2cRxIrqCount] = EUSCI_B_I2C_slaveGetData( EUSCI_B1_BASE );
            i2cRxIrqCount++;
            allRxIrqCount++;

            if( i2cRxIrqCount>=RxBufferSize )
                i2cRxIrqCount = 0;

            if( i2cRxIrqCount==5 )
            {
                // Request complete
                if( rxBytes[0]==0x80 )
                {
                    // read request 
                    Uint16*    i2cIFMemoryMapArray = (Uint16*) &i2cIFMemoryMap;              
                    Uint8      wordAddress         = rxBytes[1];
                    readWord = i2cIFMemoryMapArray[wordAddress];
                    lastReceivedAddress = wordAddress;
                    i2cTxIrqCount = 0;
                    switchLED( LED_RED, true );
                }

                if( rxBytes[0]==0x00 )
                {
                    // write request 
                    Uint16* i2cIFMemoryMapArray = (Uint16*) &i2cIFMemoryMap;              
                    Uint8      wordAddress = rxBytes[1];
                    readWord      = rxBytes[2] << 8;
                    readWord     += rxBytes[3];
                    i2cIFMemoryMapArray[wordAddress] = readWord;
                }
                i2cRxIrqCount = 0;
            }
            EUSCI_B_I2C_clearInterrupt( EUSCI_B1_BASE, EUSCI_B_I2C_RECEIVE_INTERRUPT0 );
            break;

        case USCI_I2C_UCSTTIFG:        
            ///////////////////////
            // start - interrupt //
            ///////////////////////
            startInterrupt = true;
            stopInterrupt  = false;
            EUSCI_B_I2C_clearInterrupt( EUSCI_B1_BASE, EUSCI_B_I2C_START_INTERRUPT );
            break;

    case USCI_I2C_UCSTPIFG:        
            //////////////////////
            // stop - interrupt //
            //////////////////////
            stopInterrupt  = true;
            startInterrupt = false;
            EUSCI_B_I2C_clearInterrupt( EUSCI_B1_BASE, EUSCI_B_I2C_STOP_INTERRUPT );
            break;

        default:
            break;
    }
}

The relevant variables/symbols which are defined outside the ISR are:

#define  RxBufferSize        32
volatile Uint8 rxBytes[RxBufferSize];
Uint32  i2cRxIrqCount = 0;
Uint32  i2cTxIrqCount = 0;
Uint32  allRxIrqCount = 0;
Uint32  allTxIrqCount = 0;
Uint16  lastReceivedAddress = 0xFFFF;
bool    startInterrupt = false;
bool    stopInterrupt  = false;