Dear Champs,
One of my customers pointed out an issue on MSP430F5529 DMA.
Customer did the test on TI example codes in TI Resource Explorer. The example is MSP430F55xx_dma_04.
In this example, it uses TBCCR1 as a sample and convert input into the A0 of ADC12. ADC12IFG is used to trigger a DMA transfer and DMA interrupt triggers when DMA transfer is done. There's no problem on Timer and ADC parts. As to DAM, the codes set DMA as repeat single transfer, while source address 'no change' and destination address as 'increase' mode.
But when we view the Memory Browser, we find the destination address doesn't increase at all. The ADC data is always stored to the 'DMA_DST' variable address.
Would you please help to look into this issue? Thanks.