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MSP432 DMA Source Mapping

on page 115 of the msp432p401r datasheet, the dma triggers for peripherals is given:

But I haven't found where the behaviour of the eUSCI_Bm_TXn settings is defined.

I've seen some of what Ryan Brown1 has written about this but it doesn't explain what they do.   ie. eUSCI_B1 has a TXIFG so if I wanted to run a dma channel that would send data to TXBUF of eUSCI_B1, what channel and configuration would I use?

would I use channel 0 and srccfg 5?   channel 2/srccfg 2, etc?

  • Eric,
    Thank you for pointing this out. I believe there is an omission but will need to confirm. I tried a fairly simple test and found DMA_CH5_EUSCIB2RX0 is triggered from the EUSCIB2 RXIFG while the DMA_CH1_EUSCIB2RX2 is not. Again, my suspicion is that only the RX0 and TX0 are valid for eUSCIBx but I will need to confirm.

    Regards,
    Chris

  • Chris Sterzik said:

    Eric,
    Thank you for pointing this out. I believe there is an omission but will need to confirm. I tried a fairly simple test and found DMA_CH5_EUSCIB2RX0 is triggered from the EUSCIB2 RXIFG while the DMA_CH1_EUSCIB2RX2 is not. Again, my suspicion is that only the RX0 and TX0 are valid for eUSCIBx but I will need to confirm.

    thanks for checking this out Chris.  Could you verify eUSCI_Bn TX0 and eUSCI_Bn RX0 settings work.

    And can you find out what the other triggers do?  ie.  If channel 0 is set to SRCCFG {3,4,5} what would trigger channel 0.


    Similarly for channel {1,2,3,4,5,6,7},  srccfg {3,4,5}

    you will probably go talk to the msp432 h/w folks.  It is clearly a multiplexer feeding each of the trigger inputs for each of the 8 dma channels.  The question is what does settings 3,4,and 5 select.

  • Its been 5 days.....

    any progress?

    in particular I would like to know the details of what the actual inputs to the mux that drives the dma_trigger for a particular channel...

    there are 8 channels. Each channel has an 8-to-1 mux driving its dma_trigger. For each channel can you please tell me explicitly what each of the 8 inputs to the mux are

    You will need to go rattle the h/w engineers about this who will have to look at the internal dma wiring schematic.
  • Eric,

    This is in work and I hope to have a response by Sept. 6th.  I will update the post at that time if not sooner.

    Regards,
    Chris

  • Eric,

    The additional eUSCI_Bx TXx/RXx DMA triggers are specifically for I2C communication and are tied to the 4 possible slave addresses that can be defined in I2C mode.  For example you could have up to four different DMA triggers configured with one I2C slave where each of the four slave addresses would trigger a different DMA channel.  

    http://www.ti.com/lit/ug/slau356e/slau356e.pdf#page=796 

    Please let me know if you have any additional questions.

    Chris 

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