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MSP432 to slow

Hi,

I'm just starting with msp 432.

I've attached a clock source on a pin and in the interrupt I toggle one other pin. (I need to read some serial data)

Everything works ok if the clock is 10k or below, but if the clock is 100K,1M...+ it seams that the interrupt is not handling correctly.

 I was trying to do the same thing with the TI RTOS but it was the same. I've also tried to handle the data with spi and also the same.. :/

Can you please point me out what I'm doing wrong? 48Mhz processor should handle this easily.

Thank you!

The code is from the interrupt example.


int main(void)
{
    volatile uint32_t ii;

    /* Halting the Watchdog */
    MAP_WDT_A_holdTimer();

    /* Configuring P1.0 as output and P1.1 (switch) as input */
    MAP_GPIO_setAsOutputPin(GPIO_PORT_P2, GPIO_PIN7);

    /* Configuring P1.1 as an input and enabling interrupts */
    MAP_GPIO_setAsInputPinWithPullUpResistor(GPIO_PORT_P1, GPIO_PIN5);
//    MAP_GPIO_setAsInputPin(GPIO_PORT_P1,GPIO_PIN5);
    MAP_GPIO_clearInterruptFlag(GPIO_PORT_P1, GPIO_PIN5);
    MAP_GPIO_enableInterrupt(GPIO_PORT_P1, GPIO_PIN5);

    MAP_Interrupt_enableInterrupt(INT_PORT1);

    /* Enabling SRAM Bank Retention */
    MAP_SysCtl_enableSRAMBankRetention(SYSCTL_SRAM_BANK1);
    
    /* Enabling MASTER interrupts */
    MAP_Interrupt_enableMaster();   

    /* Going to LPM3 */
    while (1)
    {
        MAP_PCM_gotoLPM3();
    }
}

/* GPIO ISR */
void PORT1_IRQHandler(void)
{
    uint32_t status;

    status = MAP_GPIO_getEnabledInterruptStatus(GPIO_PORT_P1);
    MAP_GPIO_clearInterruptFlag(GPIO_PORT_P1, status);

    /* Toggling the output on the LED */
    if(status & GPIO_PIN5)
    {
        MAP_GPIO_toggleOutputOnPin(GPIO_PORT_P2, GPIO_PIN7);
    }

}

  • user4504050 said:
    /* Going to LPM3 */ while (1) { MAP_PCM_gotoLPM3(); }

    I guess you should not send the core into LPM3, or any LPM if you need fast reactions.

    I recommend to read/re-read section 7.4.3 of the Technical Reference Manual (slau356e.pdf).

    Like:

    Similar to LPM0, the processor execution is halted during LPM3 or LPM4. LPM3 mode restricts maximum frequency of device operation to 32.768 kHz. Only RTC and WDT modules are functional out of lowfrequency clock sources (LFXT, REFO, and VLO) while in LPM3. All other peripherals are disabled and high-frequency clock sources are turned off in LPM3.

  • I've added out the LPM3 but is the same.

    thank you
  • I would suggest to measure the runtime of the pin change interrupt. This can be done by toggling a GPIO on entry and exit (albeit that adds slightly to the runtime).

    You can compare this output with the signal input (your interrupt source) using a scope.

    There will surely be a saturation point, were 100% of the runtime is "wasted" in the interrupt, i.e. the core never actually leaves the handler. You need to stay below (way below) that, either by reducing the input frequency, or the interrupt handler runtime.

  • >Everything works ok if the clock is 10k or below, but if the clock is 100K,1M...+ it seams that the interrupt is not handling correctly.

    It is simply impossible to process 1M interrupts per second on 48MHz CPU unless it is some specialized purpose-built CPU which ARM core is not. At 1MHz interrupt frequency CPU have only 48 cycles which indeed is insufficient, especially knowing that you are calling C functions from ISR(!). Even 100KHz (480 cycles per interrupt) seems too much. Maybe naked assembly-coded ISR routine can catch-up such rate, but what's the point of just reacting to input w/o doing anything with data? You really shall reconsider your approach of processing input signals. Or reconsider hardware. Perhaps you shall look at FPGA?

    Could you please tell what you want to achieve? What kind of input you are trying to capture? Perhaps there could be another way to do what you want.

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