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MSP432P401M: Continuous refresh error

Part Number: MSP432P401M

Hello everyone,

    I am using CCSV7.0.0.00042 and i am connect to my own board MSP432P401M using XDS100V2 emulator. When I run(debug) the code at first time the counter value m and n is increment continuously, also the value in  ADC14MEM0 is changes continuously  and  when i stop the programme and debug again the counter m and n  continuously increment but value in ADC14MEM0 is not varied continuously.every time i want to pause and start the debug then result is change.

I am attaching main.c file for reference

5850.main.c
//  MSP432P401M - ADC14, Sample A1, AVcc Ref and Timer32 Example, One-shot mode in free run
//
//  Description:A single sample is made on A1 with reference to AVcc.
//              ADC14 internal oscillator times sample (16x) and conversion.
//              Timer 32 (module 0) is set up in 32-bit, free-run, and ONE SHOT mode.
//              Timer count is loaded with an initial value of 0xFFFFFF.
//              After perform some function, the timer interrupt triggers
//              and the ISR is executed. Within the ISR, timer counts down and reaches the 0.
//              Software sets ADC14_CTL0_SC to start sample and
//              conversion - ADC14_CTL0 automatically cleared at EOC.It just clears the interrupt flag
//              and exits back to the main application and enters a while loop.


//************************************************************************************************//
//   SAYALI PATHAK
//   3 Feb 2017 (Created)
//   8 Feb 2017 (Changes)
#include "MSP432P401M.h"
#include <ti/devices/msp432p4xx/driverlib/driverlib.h>
#include <stdint.h>

//Defining variables for inclinometer ADC conversions
//Nikhil Bapat 8 Feb 2017

unsigned int i;
//unsigned int j;
unsigned int l=1;

//SAYALI PATHAK 21 FEB 2017
unsigned char vsenseout;
unsigned char lAngle;

// sayali pathak 16 feb 2017
uint32_t currentPowerState;


//Defining variables for inclinometer voltage to angel conversions
//
//

//Counters for debugging
unsigned int m=0;
unsigned int n=0;

//SAYALI PATHAK 17 FEB 2017
/* Timer_A Continuous Mode Configuration Parameter */
const Timer_A_UpModeConfig upModeConfig =
{
        TIMER_A_CLOCKSOURCE_ACLK,            // ACLK Clock Source
        TIMER_A_CLOCKSOURCE_DIVIDER_1,       // ACLK/1 = 32hz
        163.84,
        TIMER_A_TAIE_INTERRUPT_DISABLE,      // Disable Timer ISR
        TIMER_A_CCIE_CCR0_INTERRUPT_DISABLE, // Disable CCR0
        TIMER_A_DO_CLEAR                     // Clear Counter
};

//SAYALI PATHAK 17 FEB 2017
/* Timer_A Compare Configuration Parameter */
const Timer_A_CompareModeConfig compareConfig =
{
        TIMER_A_CAPTURECOMPARE_REGISTER_1,          // Use CCR1
        TIMER_A_CAPTURECOMPARE_INTERRUPT_DISABLE,   // Disable CCR interrupt
        TIMER_A_OUTPUTMODE_SET_RESET,               // Toggle output but
        163.84,                                     // 160 Period
};

/* Statics */
static volatile uint8_t resPos;

//*************************************************************************************
//Main code
int main(void)
{
    //Stop watchdog timer
        WDT_A->CTL = WDT_A_CTL_PW |  WDT_A_CTL_HOLD;
   //SAYALI PATHAK 17 FEB 2017
      resPos = 0;

    //this port pins is used as a UART pin
    // P1->DIR |= BIT0;
    //P1->OUT &= ~BIT0;

    // Configure GPIO
         P5->SEL1 |= BIT4;                       // Configure P5.4 for ADC
         P5->SEL0 |= BIT4;


     // UNUSED pin setup

         P10->DIR &= ~(BIT0 + BIT1 + BIT2 + BIT3); // set P10 as input direction
         P10->REN |= BIT0 +  BIT1 + BIT2 + BIT3; //enable pull-up/pull-down resistors on P10
         P10->OUT &= ~(BIT0 +  BIT1 + BIT2 + BIT3); //Set P10 resistors to pull down

         P1->DIR &= ~(BIT1 + BIT4 + BIT5 + BIT6 + BIT7);
         P1->REN |= BIT1 + BIT4 + BIT5 + BIT6 + BIT7;
         P1->OUT &= ~(BIT1 + BIT4 + BIT5 + BIT6 + BIT7);

         P2->DIR &= ~(BIT0 + BIT1 + BIT2 + BIT3 + BIT4 + BIT5 + BIT6 + BIT7);
         P2->REN |= BIT0 + BIT1 + BIT2 + BIT3 + BIT4 + BIT5 + BIT6 + BIT7;
         P2->OUT &= ~(BIT0 + BIT1 + BIT2 + BIT3 + BIT4 + BIT5 + BIT6 + BIT7);

         P8->DIR &= BIT0 + BIT1 + BIT2 + BIT3 + BIT4 + BIT5 + BIT6 + BIT7;
         P8->REN |= BIT0 + BIT1 + BIT2 + BIT3 + BIT4 + BIT5 + BIT6 + BIT7;
         P8->OUT &= ~(BIT0 + BIT1 + BIT2 + BIT3 + BIT4 + BIT5 + BIT6 + BIT7);

         P9->DIR &= ~(BIT0 + BIT1 + BIT2 + BIT3 + BIT4 + BIT5);
         P9->REN |= BIT0 + BIT1 + BIT2 + BIT3 + BIT4 + BIT5 ;
         P9->OUT &= ~(BIT0 + BIT1 + BIT2 + BIT3 + BIT4 + BIT5);

         P6->DIR &= ~(BIT0 + BIT1 + BIT2 + BIT3 + BIT4 + BIT5 + BIT6 + BIT7);
         P6->REN |= BIT0 + BIT1 + BIT2 + BIT3 + BIT4 + BIT5 + BIT6 + BIT7;
         P6->OUT &= ~(BIT0 + BIT1 + BIT2 + BIT3 + BIT4 + BIT5 + BIT6 + BIT7);

         P4->DIR &= ~(BIT0 + BIT1 + BIT2 + BIT3 + BIT4 + BIT5 + BIT6 + BIT7);
         P4->REN |= BIT0 + BIT1 + BIT2 + BIT3 + BIT4 + BIT5 + BIT6 + BIT7;
         P4->OUT &= ~(BIT0 + BIT1 + BIT2 + BIT3 + BIT4 + BIT5 + BIT6 + BIT7);

         P5->DIR &= ~(BIT0 + BIT1 + BIT2 + BIT3 + BIT4 + BIT5 + BIT6 + BIT7);
         P5->REN |= BIT0 + BIT1 + BIT2 + BIT3 + BIT4 + BIT5 + BIT6 + BIT7;
         P5->OUT &= ~(BIT0 + BIT1 + BIT2 + BIT3 + BIT4 + BIT5 + BIT6 + BIT7);

         P7->DIR &= ~(BIT0 + BIT1 + BIT2 + BIT3);
         P7->REN |= BIT0 + BIT1 + BIT2 + BIT3;
         P7->OUT &= ~(BIT0 + BIT1 + BIT2 + BIT3);

      //SAYALI PATHAK 17 FEB 2017
       /* Setting up clocks
        * MCLK = MCLK = 3MHz
        * ACLK = REFO = 32Khz */
        MAP_CS_initClockSignal(CS_ACLK, CS_REFOCLK_SELECT, CS_CLOCK_DIVIDER_1);

     /* Initializing ADC (MCLK/1/1) */
      //   MAP_ADC14_enableModule();
      //   MAP_ADC14_initModule(ADC_CLOCKSOURCE_MCLK, ADC_PREDIVIDER_1, ADC_DIVIDER_1,0);

     /* Configuring GPIOs (5.5 A0) */
     /*  MAP_GPIO_setAsPeripheralModuleFunctionInputPin(GPIO_PORT_P5, GPIO_PIN5,
            GPIO_TERTIARY_MODULE_FUNCTION);*/

     /* Configuring ADC Memory */
     //    MAP_ADC14_configureSingleSampleMode(ADC_MEM0, true);
     //    MAP_ADC14_configureConversionMemory(ADC_MEM0, ADC_VREFPOS_AVCC_VREFNEG_VSS, ADC_INPUT_A1, false);

     /* Configuring Timer_A in continuous mode and sourced from ACLK */
         MAP_Timer_A_configureUpMode(TIMER_A0_BASE, & upModeConfig);

     /* Configuring Timer_A0 in CCR1 to trigger at 163.84 (0.005s) */
         MAP_Timer_A_initCompare(TIMER_A0_BASE, &compareConfig);

     /* Configuring the sample trigger to be sourced from Timer_A0  and setting it to automatic iteration after it is triggered*/
    //     MAP_ADC14_setSampleHoldTrigger(ADC_TRIGGER_SOURCE1, false);

      /* Enabling the interrupt when a conversion on channel 1 is complete and enabling conversions */
     //    MAP_ADC14_enableInterrupt(ADC_INT0);
     //    MAP_ADC14_enableConversion();

      /* Enabling Interrupts */
      //   MAP_Interrupt_enableInterrupt(INT_ADC14);
      //   MAP_Interrupt_enableMaster();

      /* Starting the Timer */
         MAP_Timer_A_startCounter(TIMER_A0_BASE, TIMER_A_UP_MODE);

              /* Going to sleep
              while (1)
              {
                  MAP_PCM_gotoLPM0();
              }*/

     //sayali pathak 16 feb 2017

     /*Transition to VCORE Level 1: AM0_LDO --> AM1_LDO */
     /* Get current power state, if it's not AM0_LDO, error out */
            currentPowerState = PCM->CTL0 & PCM_CTL0_CPM_MASK;
            if (currentPowerState != PCM_CTL0_CPM_0)
                error();

            while ((PCM->CTL1 & PCM_CTL1_PMR_BUSY));
            PCM->CTL0 = PCM_CTL0_KEY_VAL | PCM_CTL0_AMR_1;
            while ((PCM->CTL1 & PCM_CTL1_PMR_BUSY));
            if (PCM->IFG & PCM_IFG_AM_INVALID_TR_IFG)
                error();                            // Error if transition was not successful
            if ((PCM->CTL0 & PCM_CTL0_CPM_MASK) != PCM_CTL0_CPM_1)
                error();                            // Error if device is not in AM1_LDO mode

      /*  Configure Flash wait-state to 1 for both banks 0 & 1 */
            FLCTL->BANK0_RDCTL = (FLCTL->BANK0_RDCTL & ~(FLCTL_BANK0_RDCTL_WAIT_MASK)) |
                    FLCTL_BANK0_RDCTL_WAIT_1;
            FLCTL->BANK1_RDCTL  = (FLCTL->BANK0_RDCTL & ~(FLCTL_BANK1_RDCTL_WAIT_MASK)) |
                    FLCTL_BANK1_RDCTL_WAIT_1;

      //SAYALI PATHAK 9 FEB 2017
      // Configure DCO to 48MHz, ensure MCLK uses DCO as source
         CS->KEY = CS_KEY_VAL ;                  // Unlock CS module for register access
         CS->CTL0 = 0;                           // Reset tuning parameters
         CS->CTL0 = CS_CTL0_DCORSEL_5;           // Set DCO to 48MHz
         CS->CTL1 = (CS->CTL1 & ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK)) |  CS_CTL1_SELM_3;  // Select MCLK = DCO, no divider
         CS->KEY = 0;                           // Lock CS module from unintended accesses

      //ADC Setup
         ADC14->CTL0 = ADC14_CTL0_SHT0_2 | ADC14_CTL0_SHP | ADC14_CTL0_ON; // Sampling time, S&H=16, ADC14 on
      // ADC14->CTL1 = ADC14_CTL1_RES_2;         // Use sampling timer, 12-bit conversion results
         ADC14->CTL1 = ADC14_CTL1_RES_3;         // Use sampling timer, 14-bit conversion results
         ADC14->MCTL[0] |= ADC14_MCTLN_INCH_1;   // A1 ADC input select; Vref=AVCC
      // ADC14->IER0 |= ADC14_IER0_IE0;          // Enable ADC conv complete interrupt

  /*  // Timer32 set up in one-shot, free run, 32-bit, no pre-scale
           TIMER32_1->CONTROL = TIMER32_CONTROL_SIZE |
           TIMER32_CONTROL_ONESHOT;

      // Load Timer32 Counter with initial value
           TIMER32_1->LOAD= 0xFFFFFF;

     // Enable the Timer32 interrupt in NVIC
          __enable_irq();
          NVIC->ISER[0] = 1 << ((T32_INT1_IRQn) & 31);

     // Start Timer32 and enable interrupt
         TIMER32_1->CONTROL |= TIMER32_CONTROL_ENABLE |
         TIMER32_CONTROL_IE;

     // Disable sleep on exit from ISR
         SCB->SCR &= ~SCB_SCR_SLEEPONEXIT_Msk;

     // Enter LPM0 and wait for the timer interrupt to wake-up
         __sleep();
         __no_operation();*/



   while (1)
   {
    if(l == 1)
   {

     // Timer32 set up in periodic ,free run, 32-bit, no pre-scale
       TIMER32_1->CONTROL = TIMER32_CONTROL_SIZE | TIMER32_CONTROL_ONESHOT;

     // Load Timer32 Counter with initial value
        TIMER32_1->LOAD= 0xFFFFFF;
     // TIMER32_1->LOAD= 0xFFFF;

     // Enable the Timer32 interrupt in NVIC
        __enable_irq();
        NVIC->ISER[0] = 1 << ((T32_INT1_IRQn) & 31);

     // Disable sleep on exit from ISR
        SCB->SCR &= ~SCB_SCR_SLEEPONEXIT_Msk;

     // Start Timer32 and enable interrupt
        TIMER32_1->CONTROL |= TIMER32_CONTROL_ENABLE |  TIMER32_CONTROL_IE;


     // Enter LPM0 and wait for the timer interrupt to wake-up
     //  __sleep();
     // __no_operation();

     // sayali pathak 21 feb 2017
        switch (vsenseout)

        {

         case 1: 0x800<=vsenseout<=0x974;
         // lAngle = 0x974 + (0x3974*vsenseout/0x174);
            lAngle = 0x974 + (0x27*vsenseout);
            break;

         case 2:0x974<vsenseout<=0x1666;
         //lAngle = 0x1666 + (0x2C5D*vsenseout/0xCF2);
           lAngle = 0x1666 + (0x03*vsenseout);
           break;


         case 3: 0x1666<vsenseout<=0x1D87;
         //lAngle =  0x1D87 + (0x2C5D*vsenseout/0x721);
           lAngle =  0x1D87 + (0x06*vsenseout);
           break;


         case 4:0x1D87<vsenseout<=0x2517;
         //lAngle =  0x2517 + (0x2C5D*vsenseout/0x790);
           lAngle =  0x2517 + (0x05*vsenseout);
           break;

         case 5: 0x2517<vsenseout<=0x2C5D;
         //lAngle = 0x2C5D + (0x2C5D*vsenseout/0x746);
           lAngle = 0x2C5D + (0x06*vsenseout);
           break;

         case 6: 0x2C5D<vsenseout<=0x3358;
         //lAngle = 0x3358 + (0x2C5D*vsenseout/0x6FB);
           lAngle = 0x3358 + (0x06*vsenseout);
           break;

         case 7: 0x3358<vsenseout<=0x3974;
         //lAngle = 0x3974 + (0x2C5D*vsenseout/0x61C);
           lAngle = 0x3974 + (0x07*vsenseout);
           break;


         case 8 : 0x3974<vsenseout<=0x41E4;
         //lAngle = 0x41E4 + (0x3974*vsenseout/0x870);
           lAngle = 0x41E4 + (0x06*vsenseout);
           break;

         default :
           lAngle = 0x5555;                 //error
           break;

         }

       m++;
       if (m>50000)
       {
           m=0;
       }

       l=0;

    }
    }
 }
void T32_INT1_IRQHandler(void)
{
    // P1->OUT ^= BIT0;                    // Toggle P1.0 LED

    // Start sampling/conversion
       ADC14->CTL0 |= ADC14_CTL0_ENC | ADC14_CTL0_SC;
       n++;
       if (n==50000)
       {
           n=0;
       }


     TIMER32_1->INTCLR |= BIT0;  // Clear Timer32 interrupt flag

   // Disable the timer and interrupt
      TIMER32_1->CONTROL &= ~(TIMER32_CONTROL_ENABLE |TIMER32_CONTROL_IE);
      l= 1;

}

//SAYALI PATHAK 16 FEB 2017
void error(void)
{
    volatile uint32_t i;

  //  while (1)
 //   {
       // P1->OUT ^= BIT0;
//        for(i = 20000; i > 0; i--);           // Blink LED forever
 //   }
}


//SAYALI PATHAK 17 FEB 2017
/* This interrupt is fired whenever a conversion is completed and placed in ADC_MEM0

void ADC14_IRQHandler(void)
{
    uint64_t status;

    status = MAP_ADC14_getEnabledInterruptStatus();
    MAP_ADC14_clearInterruptFlag(status);


  //  if (status & ADC_INT0)
  // {
  //     resultsBuffer[resPos++] = MAP_ADC14_getResult(ADC_MEM0);
  // }

}*/


what i can do?? this is happened when i am adding the code for 48Mhz frequency and sampling frequency setting.

  • Hello,
    I would recommend working with one of the code examples. dev.ti.com/.../

    Regarding the debug with timerA please refer to this post e2e.ti.com/.../568357 .

    Thanks and Regards,
    Chris
  • Hello Chris,

       I am doing following steps in debug session :-

    1)Scripts -> MSP432 Debug Clock Control

    2)Freeze TimerA module 

    and now when programme is stop and debug again ADC14MEM0 value is change continuosly.

    But, there is one interesting thing is happened that,the value of ADC14MEM0 in resistor window is not change continuosly. When i am doing this steps:-

    right click on ADC14MEM0- watch. 

    I can see ADC14MEM0 value in expression window and in this window value is changes continuously.

    Why this is happening??

    Thanks

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