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MSP430I2040: customer use MSP-FET can program i2040 but gang can't program i2040 base on same hardware

Lisa Ding
Expert 6525 points
Part Number: MSP430I2040
Other Parts Discussed in Thread: MSP-GANG, MSP-FET

Hi Champs,

Customer add 2.2nF cap on TEST pin and use MSP-FET to program i2040 successfully. However, use MSP-GANG to program i2040 in production line, it failed to program i2040. After remove capacitor and use MSP-GANG programmer, i2040 can be programed. I guess because the voltage supply is different between gang & FET. Could you please tell me what is main difference between gang and FET to cause this situation ?

Also, customer would like to know how can they fix this. Right now. they remove the cap and use gang to program. After program the add cap back. They want to make production more easily. Do we have any suggestion ?

  • 0
    TI__Expert 5200 points

    Hello Lisa,

    Why is your customer putting cap on test pin? generally we don't recommend this as it works as clock pin. However, I have worked in past with one customer who has put 1nF for noise immunity and it worked for him with his use case. You can try the same...

    Regards,

    Vikas Chola

  • 0 in reply to Vikas Chola
    TI__Expert 6525 points
    Hi Vikas,
    thanks for your reply. Customer put cap on test for surge issue and they considered that if they change smaller cap value. Surge test might not be able pass... If we add ESD protection IC on that, will it effect timing ? just think about this.
  • 0 in reply to Lisa Ding
    TI__Guru**** 202236 points
    Hi Lisa,

    Do you mean to say the RST line as compared to TEST? Parasitic capacitance is slightly different between the MSP-FET and MSP-GANG which could affect your programming ability. A RST capacitance value of less than 2.2 nF is acceptable. ESD protection is a completely different matter: www.ti.com/.../slaa530.pdf

    Regards,
    Ryan
  • 0 in reply to Ryan Brown1
    TI__Expert 6525 points

    Hi Ryan,

    thanks for your reply. Customer put 2.2nF on TEST for surge issue. But it looks like customer can't use MSP-GANG to program i2040 due to cap. After remove cap, customer can use GANG to program. However, customer wondering that why he can use MSP-FET program i2040 but MSP-GANG can't. i think this is because GANG is 1 to 8. The clock path is longer than FET. Parasitic cap might be bigger than FET. If you have other idea which cause FET work but GANG can't, please let me know.

    For ESD, i just want to ask customer to change cap to ESD. But i am afraid of ESD also cause extra cap which impact clock as well.  

  • 0 in reply to Lisa Ding
    TI__Guru 68116 points

    Hi Lisa,

    I support the MSP-GANG.

    Lisa Ding said:
    i think this is because GANG is 1 to 8. The clock path is longer than FET. Parasitic cap might be bigger than FET.

    You are correct - this is the reason. The MSP-GANG is set up in hardware to program 8 devices at once and this causes it to be more sensitive to capacitance on the programming lines, especially reset and test. It also can be sensitive to using separate wires instead of the provided ribbon cable, or very long lines between the MSP-GANG and the target device, for the same reasons. Could any of these also be affecting your setup? My recommendations would be:

    1. Keep the traces and lines connecting the target device to the MSP-GANG as short as possible.

    2. If possible, use the provided ribbon cable, not single wires connecting the MSP-GANG to the target device.

    3. If you've done 1 & 2, you may also need a smaller cap on TEST. Or you may need to look into programming parts in socketed boards before they are installed on your boards instead.

    But I will also point out that putting a cap on TEST is outside of the specified programming connections in the hardware tools user's guide http://www.ti.com/lit/pdf/slau278, so the fact that it works with MSP-FET is also somewhat "lucky" and not necessarily guaranteed. But I also understand your customer's concerns about signals on the TEST line being able to cause issues with the device in the field and wanting to protect that pin. Hopefully, some of the above suggestions can help.

    Regards,

    Katie

  • 0 in reply to Katie Pier
    TI__Expert 6525 points

    Hi Katie,

    thanks for your reply. Customer used ribbon cable already. I will asked them to change smaller cap. I also will tell them MSP-FET cab program is somehow "lucky" thing. thank you!

  • 0 in reply to Katie Pier
    Guru 33653 points

    Katie Pier said:

    Hi Lisa,

    I support the MSP-GANG.

    Lisa Ding
    i think this is because GANG is 1 to 8. The clock path is longer than FET. Parasitic cap might be bigger than FET.

    You are correct - this is the reason. The MSP-GANG is set up in hardware to program 8 devices at once and this causes it to be more sensitive to capacitance on the programming lines, especially reset and test.

    All target devices are connected by dedicated / separated / isolated RESET and TEST lines. Clock line length is the same as with FET (also the lvc line driver). It is irrelevant if 1 to 8 or 16 or 32 target device are connected at the same time.

    I guess that MSP-GANG toggling TEST line on higher rate than FET, and with extra capacitance on TEST line it can't work.

  • 0 in reply to zrno soli
    TI__Expert 6525 points
    Hi Zron,

    thanks for your reply. Do you mean MSP-GANG SBW clock is higher than MSP-FET ? thanks.
  • 0 in reply to Lisa Ding
    Guru 33653 points
    Yes.

    Here, on e2e, and inside MSP-GANG manual can be found schematic for isolating FET programming line from cap on RESET pin. Same can be applied to TEST pin for isolating cap from FET.
  • 0 in reply to zrno soli
    TI__Expert 6525 points
    hi Zron,
    thanks for your reply. I will check MSP-GANG user manual. thank you.

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