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MSP430I2041: TLV checsum fails and incorrect clock frequency observed

Part Number: MSP430I2041
Other Parts Discussed in Thread: EVM430-I2040S

Hi,

For my application, I am attempting to reprogram the EVM430-I2040S. I started by trying to check the SMCLK output, by using basically the TI sample code and just changing the divider for MCLK and SMCLK

#include "msp430.h"

void main(void) {
    WDTCTL = WDTPW | WDTHOLD;       // Stop Watchdog Timer

    CSCTL0  =  0;                   // Internal Resistor
    CSCTL1 |=  DIVM__1 | DIVS__1;   // MCLK = DCO, SMCLK = DCO

    P1DIR  |=   BIT0 | BIT1;        // P1.0, P1.1 Output
    P1SEL1 |=   BIT0 | BIT1;        // MCLK, SMCLK Pin Function
    P1SEL0 &= ~(BIT0 | BIT1);

    while(1);
}

Since I had not performed the calibration routine, as expected I observed a random frequency value of 11.92 MHz.

I included the low_level_init.c file provided in the sample code, so as to calibrate the DCO. However, I observed that in Code Composer Studio, the code will get stuck and unable to reach the first line of main (run and pause buttons greyed out and nothing happens). I realized that the _system_pre_init function was getting calculating an incorrect checksum and hitting LPM4.

if (*((unsigned int *)TLV_START) != checksum)
{
    /* Enter LPM4 if checksum failed */
    __bis_SR_register(LPM4_bits);
}

What are the implications of this? I tried to comment out this portion of the code, and was able to successfully build and debug the project. However, in this case I observed a weird SMCLK out frequency of 20.833 MHz!! (Below is shown the SMCLK out on a logic analyzer)

What can be the reason ? Is there a way to fix this?

Thanks

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