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MSP430F5529: Generating synchronous PWM waveform

Part Number: MSP430F5529
Other Parts Discussed in Thread: ADS8363

I wanted to generate two PWM  waveforms, one of them being clock at the end I need to communicate with ADS8363 but as there normal SPI wont work,I wanted to know how to generate waveform which are synchronous(and have little phase diff so as I can use one PWM waveform CLK to trigger other PWM RD/CONVST continuously ).I am trying ,using TA_0 and TA_1 in MSP for same.

Can you please,give some sample code that will be too helpful.I tried to source one PWM to another externally,but I am not getting.

Sorry, if any mistakes (typo).

Regards

Anmol

  • If you don't care about specific phase differences then this is as simple as starting one timer before the other. Use the TxCTL register to clear the counter (TARCLR bit) and select the mode control (MC). Figures 17-12 through 17-14 show various PWM outputs given the mode control and output mode (OUTMOD bits of TAxCCTLn register). TI provides several timer examples from the Tools & software tab of the MSP product page.

    Regards,
    Ryan
  • Thank You Sir,sorry for late reply.

    I am able to genrate that waveform one of PWM is CLK another is PD/CONvST,I used CLK as external source to another PWM,

    Sir I am using MSP in slave mode ,I am trying  to receive data from ADC ADS 8363 EVM , I can see the output in scope but but SPI reading zero every time , but  earlier it read 0xff all the time ,I guess this is NOP ,but UCBUSY STATUS is always high.Even after transmitting the data and reciving. I am using it in MODE0.I am trying for using this to interface with ADC .Please give some suggestions.Please note that I am checking TX and UCRX interrupt flags.While writing the data into buffer.

    //************ INI code**************************

    P3SEL |= BIT3+BIT4; // P3.3,4 option select
    P2SEL |= BIT7; // P2.7 option select

    UCA0CTL1 |= UCSWRST; // **Put state machine in reset**
    UCA0CTL0 |= UCSYNC+UCMSB; // 3-pin, 8-bit SPI SLAVE,captutred on FALLING edge
    UCA0CTL0 &= ~UCMST;
    // Clock polarity high, MSB
    UCA0CTL1 |= UCSSEL_2; // SMCLK
    UCA0BR0 = 0x08; // /8
    UCA0BR1 = 0; //
    UCA0MCTL = 0; // No modulation
    UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
    UCA0IE |= UCRXIE; // Enable USCI_A0 RX interrupt

    //************transmission code**************************

    UCA0TXBUF = reg1;
    while (!(UCA0IFG&UCTXIFG));
    while (!(UCA0IFG&UCRXIFG));
    data1 = UCA0RXBUF;

    Please do point out any mistake or suggestions.I am trying to analyse it in Debugging mode.

    Regards,

    Anmol 

  • Hello Anmol,

    I do not have much experience with a system where both devices are driven as slaves, the SPI clock is simulated, and there is no active master. Are you feeding P2.7 with a valid UCA0CLK? Are you sure that the SPI clock polarity and phase are the same between devices? Why are you checking the receive and transmit IFGs instead of the UCBUSY bit? Can you provide oscilloscope or logic analyzer screenshots of your SPI communication lines?

    Regards,
    Ryan
  • Thanks Sir for early reply

    Yes I am feedin  P2.7 with clock, when I am looped the SOMI and SIMO pins I am getting the passed data back.This clears that clock is in range ,well I am not sure regarding the clock range in SPI Slave mode.The Clock Polarity and phase is ok .I am in habit to use RX TX BUF interrupt flags later I checked UCBUSY bit as I reffered to sample programs in Resource Explorer.As I never required but only to load data I needed these RX TX BUF.

    I am attaching one scope image ,ref: YELLOW:CLK;Blue :RD/CONVST;Green data (DATA IN of MSP).

    EDIT1: I was running the whole bit loading (transmission) in one function and I was calling this into main function in an infinite loop ,I made a mistake in checking UCBUSY as its getting 0 when I entered into that function which calls these statements but when I come back to main function the status changed to 1.This is sounding something weird whose reason I am not able to get.I am attaching some snaps below:Th

     The Second image is in the transmission function.

    One more thing I forgot that COE flag was not resetting(was continuously set in transmission func.) even after RXBUF was assigned to variable I even did 2 dummy read to check whether it resets or not.,I hope this some clue in this problem.

    Sorry If any mistakes.

    Best Regards

    Anmol

  • Hi I changed the module to UCSIB0SPI now it was working fine,only the issue is I am not able match start of ADC SDOx and start of SPI read I had tried things regarding to match these by using STE of MSP spi module and unsucessful.Can you suggest it.

    Regards 
    Anmol 

  • Hi Anmol,

    This is the dilemma involved with setting both devices as slaves. You can try pulling the ADS8363's RD line low while at the same time releasing the USCI from reset (UCSWRST) all within a SPI clock period. Maximizing the MCU system frequency may help compensate.

    Regards,
    Ryan
  • Hi 

    As I told you I am using another TIMER for generating this RD pulse,Then manual control wont be possible,can you elaborate the statement .I am not able to get it completely.

    Regards

    Anmol

  • You can use timer interrupts to act when RD goes low but you are once more restricting your options with regards to timing, hence the importance of having a master device in this setup.

    Regards,
    Ryan
  • Hi

    I was trying to work with interrupts buts entering into TRAP ISR default handler,I am using CCIFG of CCR1 to check for producing anotrher timer waveform when this interrrupt is encounter.

    I have name of VECTOR correctly as well as activated "GIE" general interrupts still its not working.As soon as the debugger reaches the 

    __bis_SR_register(GIE); // Enter LPM0, enable interrupts

    statement it goes into default ISR.


    Please  look into this matter.I am planning to give TA2 CCR1 o/p as STE to SPI

    Regards

    Anmol

  • Hi Anmol,

    Are you running to the end of main without a forever while loop or entering a low power mode? Are there any interrupts that you have enabled other than those shown? Do you stop the watchdog timer beforehand? The TAIFG interrupt source in TA1IV is 14, not 10. Do not set TAIE if you do not need it.

    Regards,
    Ryan
  • Hi ,

    I am running this function in main following some Spi function calls in infinite loop.

    watchdog Timer is off.

    LPM0 IS not activate(wrong comment).

    I wanted to use CCIFG1 FOR starting timer.

    Regards

    Anmol

  • Some interrupt flag is calling an ISR which has not been initialized, therefore the trap must be entered as a warning. Start with the code example and verify that it does not cause any changes, then start making your own changes until you find the peripheral which is causing the issue.

    Regards,
    Ryan
  • Hi ,I have checked I have enabled SPI RX TX BUF interrupts.I checked in debugging mode that after the

    __bis_SR_register(LPM0_bits+GIE); // Enter LPM0, enable interrup

    The flow of control goeas to an ISR immediately.
    Yes TAIV has to be till 14 but I had to use "2 ", so I think that is not reason for this behavior.
    Also I checked Resouce Explorer Codes of timers with interruptswhich were also taking some time after they finish the main() .
    Regards
    Anmol

    EDIT:I got that interrupt working ,it was due SPI TX RF BUF interrupt.

    But I am still unable the to read  SDOx of the  ADC.I had tried some ways but its still way far.

  • Hi,

    I was able to read the data properly now, as I used two module of SPI one in master and other in slave mode and looping clock from outside
    .Using one of the SDOx as Rd signal.Any of SDI may be used for data reading.I also mapped port 4 to bring another module which shall solve my DAC issue interface, right now only facing issues related to correctness of ADC.Thank you for help.

    Regards,
    Anmol

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