Other Parts Discussed in Thread: MSP430F5436
I have an MSP430F5359 processor on a board with an external
14Mhz XT2 crystal . XT2 is used as the clock source for ACLK and SMCLK.
The timer ISR used to blink an LED uses ACLK as the clock source.
The power consumption does not drop when XT2 is used as
the clock for ACLK when entering LPM3. It appears that he processor does
not go into sleep mode when XT2 is used as the clock source.
If the clock source for ACLK is changed to REFOCLK (UCSCTL4 = SELA__REFOCLK + SELS__REFOCLK + SELM__XT2CLK )
the power consumption drops down when entering LPM3 and things appear to work correctly.
Any ideas on why we continue to burn power when the external crystal is used as the clock source for ACLK in LPM3 ? .
// Timer1 interrupt service routine
#pragma vector=TIMER1_A0_VECTOR
__interrupt void TIMER1_A0_ISR(void) {
P8OUT ^= BIT1; // Toggle LEDs
}
int main( void )
{
WDTCTL = WDTPW + WDTHOLD;
P1SEL = 0x00; P1DIR = 0x00; P1IE = 0x00;
P2SEL = 0x00; P2DIR = 0x00; P2IE = 0x00;
P3SEL = 0x0F; P3DIR = 0x00;
P4SEL = 0x00; P4DIR = 0x00;
P5SEL = 0x00; P5DIR = 0x00;
P6SEL = 0x00; P6DIR = 0x00;
P7SEL |= BIT2+BIT3;
P8SEL = 0x00; P8DIR |= 0x02;
P9SEL = 0x00; P9DIR = 0x00;
UCSCTL0 = 0x0000;
UCSCTL1 = DISMOD + DCORSEL_0;
UCSCTL2 = FLLN0 + FLLD_0;
UCSCTL3 = SELREF__REFOCLK | FLLREFDIV_0;
// UCSCTL4 = SELA__REFOCLK + SELS__REFOCLK + SELM__XT2CLK ; //LPM3 works with low current consumption
UCSCTL4 = SELA__XT2CLK + SELS__REFOCLK + SELM__XT2CLK ; //The current consumption is about 80 ma
UCSCTL5 = DIVM__1 + DIVS__16 + DIVA__16;
UCSCTL6 = XT1OFF+ XCAP_3+XT1DRIVE_0+XT2OFF + XT2DRIVE_0;
UCSCTL8 = 0x00; //disable conditional clock requests
while(SFRIFG1 & OFIFG) { // Check OFIFG fault flag
while ( (SFRIFG1 & OFIFG)) // Check OFIFG fault flag
{
// Clear OSC fault flags
UCSCTL7 &= ~(DCOFFG + XT1LFOFFG + XT1HFOFFG + XT2OFFG);// Clear XT2,XT1,DCO fault flags
SFRIFG1 &= ~OFIFG; // Clear OFIFG fault flag
}
UCSCTL6 &= ~(XT1DRIVE1_L+XT1DRIVE0);// Reduce the drive strength
}
TA1CCTL0 = CCIE;
TA1CCR0 = 50000;
TA1CTL = TASSEL_1 + MC_1 + TACLR; // ACLK is the clock source
__bis_SR_register(LPM3_bits + GIE); // Enter LPM3, enable interrupts
__no_operation();
}