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[FAQ] Compiler/MSP430FR2522: Missing “Workaround specified silicon errata” [CPU21], [CPU22] and [CPU40] compiler flags for MSP430FR2522, MSP430FR2422 and MSP430FR2512 devices in Code Composer Studio and IAR embedded workbench.

Part Number: MSP430FR2522

Tool/software: TI C/C++ Compiler

Of particular importance, CPU40 causes assembler instructions to be skipped, potentially causing unpredictable behavior.
Refer to the device’s errata document for details on these silicon issues.

http://www.ti.com/lit/er/slaz705c/slaz705c.pdf

Code Composer Studio
In versions prior to 8.2.0., these compiler flags are not enabled by default.
A user must manually enable these by checking the boxes in the Runtime Model Options window as shown here.

Impacted Projects are:

  • Projects created with versions of CCS earlier than 8.2.0
  • CapTIvate firmware projects generated by the CapTIvate Design Center
    • Note: CapTIvate Design Center example firmware projects and device ROM were generated with the compiler flags enabled, so these are not impacted.

This issue has been corrected starting with Code Composer Studio version  8.2.0.
However, upgrading to the newer version will not fix existing firmware projects created with earlier versions of CCS.
The user must manually enable these settings in their project settings.

IAR Embedded Workbench
In versions prior to 7.12.2, these compiler flags are not being enabled by default. 

MSP430GCC
MSP430GCC in Code Composer Studio – same as Code Composer Studio above.
GCC stand-alone will be updated in its next regularly planned update (expected 3Q)

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