MSP430F2012 interrupt problem

Hi Doug,

writing to the P1IES and P2IES registers can result in setting the corresponding interrupt flags. So, pls provide some more information how you want to configure the I/Os (i.e. P1.0=input, pull-up enabled, interrupt on HIGH->LOW-transition, ..).

Rgds
aBUGSworstnightmare 

i would like to generate an interrupt when input P1.0 transitions from low to high and would like to enable the pullup resistor on P1.0.

the problem i'm having is that when i enable the pullup, i can't seem to clear the interrupt flag inP1IFG.  i've tried clearing the flag in code (P1IFG = 0x00;) and tried clearing it manually using the debugger in ccs, but nothing works.  if i disable the pullup resistor (P1REN = 0x00;), i am able to clear the interrupt flag.

thanks,

doug

Is this pin connected to anything on your board that might be driving the pin up and down, this can be verified using an oscilloscope.  If there is nothing externally driving the pin high and low, there is also the possibility that the chip has been damaged or is defective.  Are you able to easily replace the chip in your board, or have you tried to duplicate this problem on another board?

It is possible that the line is loaded so 'much' that the small internal pullup will pull the line into a range where the signal is in the middle of high and low. The schmitt-trigger (hysteresis) will usualyl prevent oscillation, but a small oscillating change of the load (maybe in the MHz area) might still cause a signal swing that constantly triggers the edge interrupt.

Try applying a bigger pullup current. e.g. a 10k instead of the internal up to 50k resistor.

have the same problem... as i set P1REN, P1IFG is automatically sets aswell (no idea why). i CAN change P1IFG though (as oppose to what is written above)

any idea why such thing happens??

The port interrupt logic doesn’t distinguish (and can’t) between an external event changing the input state or an internal one. If you suddenly enable the internal pull-up and this changes the state of the input, it will trigger an interrupt, as if you had connected an external wire to VCC (or GND, depending on resistor direction).

I do fully agree with Jens, although I cannot understand why you are unable to clear the flag as the interrupt only occurs due to a change from one level to another.

lets assume that at the beginnng: PIDIR = 0, P1REN = 0, P1OUT = 0, P1IN = 0.

as setting P1REN and P1OUT --> P1IN is sets and  also P1IFG is unwillingly sets. 

isn't P1IFG suppose to flag  only when P1IN is reseted?

thank you! you are both helpful!!

When P1IFG is set depends not only on P1IN but also on P1IES. Also, changing P1IES may set P1IFG. The interrupt edge detection logic is quite simple. Any configuration or state change may cause an ‘edge’ being detected.